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Inventor

William F. Kraus

Inventor
Colorado Springs, CO, US

Overview

23→
Patents
1996–2020
Patent span
Physics
Primary field (CPC G)

Patents· 23 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores54%
G06FElectric digital data processing14%
H03KPulse technique11%
G05FSystems for regulating electric or magnetic variables7%
G01RMeasuring electric variables4%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes4%
G09GArrangements or circuits for control of indicating devices using static means to present variable information4%
H10BElectronic memory devices4%
PatentTitleYear
10,831,811Resolution of ambiguous and implicit references using contextual information202010,216,484Random number generation with ferroelectric random access memory20199,236,107'FRAM cell with cross point access'20166,442,576'Searching for documents with multiple element types'20026,430,093'CMOS boosting circuit utilizing ferroelectric capacitors'20026,266,684'Creating and saving multi-frame web pages'20016,252,793'Reference cell configuration for a 1T/1C ferroelectric memory'20016,185,123'Memory cell configuration for a 1T/1C ferroelectric memory'20016,141,237'Ferroelectric non-volatile latch circuits'20006,060,919'CMOS preferred state power-up latch'20006,028,783'Memory cell configuration for a 1T/1C ferroelectric memory'20005,995,406'Plate line segmentation in a 1T/1C ferroelectric memory'19995,986,919'Reference cell configuration for a 1T/1C ferroelectric memory'19995,978,251'Plate line driver circuit for a 1T/1C ferroelectric memory'19995,956,266'Reference cell for a 1T/1C ferroelectric memory'19995,901,088'Sense amplifier utilizing a balancing resistor'19995,880,989'Sensing methodology for a 1T/1C ferroelectric memory'19995,867,047'Bandgap reference based power-on detect circuit including a suppression circuit'19995,852,376'Bandgap reference based power-on detect circuit including a supression circuit'19985,804,996'Low-power non-resetable test mode circuit'19985,774,392'Bootstrapping circuit utilizing a ferroelectric capacitor'19985,598,366'Ferroelectric nonvolatile random access memory utilizing self-bootstrapping plate line segment drivers'19975,544,301'Object-oriented view layout system'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2002Patents assigned to RAMTRON INT CORP (17)· patent assignee history
1997–2001Based in Colorado Springs, CO, US· patent location history
1998Patents assigned to HITACHI LTD (1)· patent assignee history
2000–2002Based in Palmer Lake, CO, US· patent location history
2001–2002Patents assigned to ADOBE SYSTEMS INC (2)· patent assignee history
2001–2002Based in Moss Beach, CA, US· patent location history
2016–2019Patents assigned to TEXAS INSTRUMENTS INC (2)· patent assignee history
2016–2019Based in Plano, TX, US· patent location history
2020Patents assigned to ORACLE INT CORP (1)· patent assignee history
2020Based in Bainbridge Island, WA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
RAMTRON INT CORP171997–2002
ADOBE SYSTEMS INC22001–2002
TEXAS INSTRUMENTS INC22016–2019
HITACHI LTD11998
ORACLE INT CORP12020
Locations
LocationPatentsSpan
Colorado Springs, CO, US141997–2001
Palmer Lake, CO, US32000–2002
Plano, Texas, US22016–2019
Moss Beach, California, US22001–2002
Bainbridge Island, Washington, US12020