Inventor

Toru Tanzawa

Inventor

Tokyo, JP

Overview

1996–2021

Patent span

Physics

Primary field (CPC G)

Patents· 279 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores52%

H10BElectronic memory devices12%

H01LSemiconductor devices10%

H10DInorganic electric semiconductor devices7%

G06FElectric digital data processing6%

H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems2%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%

H03KPulse technique2%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h101%

G05FSystems for regulating electric or magnetic variables1%

PatentTitleYear

11,018,135Three-dimensional devices having reduced contact length2021 10,998,054Random telegraph signal noise reduction scheme for semiconductor memories2021 10,964,400Memory read apparatus and methods2021 10,956,642Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information2021 10,916,313Apparatus and methods including establishing a negative body potential in a memory cell2021 10,901,623Memory device including mixed non-volatile memory cell types2021 10,879,255Apparatuses including memory arrays with source contacts adjacent edges of sources2020 10,854,293Segmented memory operation2020 10,824,336Sequential memory access operations2020 10,796,778Apparatuses and methods to control body potential in 3D non-volatile memory operations2020 10,784,269Memory device including pass transistors in memory tiers2020 10,770,470Memory array having connections going through control gates2020 10,748,918Methods of forming semiconductor device structures including staircase structures2020 10,741,259Apparatuses and methods using dummy cells programmed to different states2020 10,734,049Apparatuses and methods involving accessing distributed sub-blocks of memory cells2020 10,706,895Interconnections for 3D memory2020 10,692,870Three-dimensional devices having reduced contact length2020 10,685,721Apparatuses and methods for charging a global access line prior to accessing a memory2020 10,672,477Segmented memory and operation2020 10,580,502Memory read apparatus and methods2020 10,580,790Semiconductor apparatus with multiple tiers, and methods2020 10,573,728Field effect transistors having a fin2020 10,521,130Memory device including mixed non-volatile memory cell types2019 10,510,420Random telegraph signal noise reduction scheme for semiconductor memories2019 10,504,599Connecting memory cells to a data line sequentially while applying a read voltage to the memory cells and programming the read data to a single memory cell2019 10,490,292Apparatuses and methods to control body potential in 3D non-volatile memory operations2019 10,484,718Memory having memory cell string and coupling components2019 10,453,538Apparatus and methods including establishing a negative body potential in a memory cell2019 10,379,738Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation2019 10,366,759Memory devices having selectively electrically connected data lines2019 10,354,030Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information2019 10,340,015Apparatuses and methods for charging a global access line prior to accessing a memory2019 10,310,734Tier mode for access operations to 3D memory2019 10,304,498Interconnections for 3D memory2019 10,282,093Sequential memory access operations2019 10,269,431Memory devices having selectively electrically connected data lines2019 10,262,745Apparatuses and methods using dummy cells programmed to different states2019 10,262,739Devices including memory arrays, row decoder circuitries and column decoder circuitries2019 10,242,742Segmented memory and operation2019 10,224,103Memory devices with a transistor that selectively connects a data line to another data line2019 10,210,940Memory read apparatus and methods2019 10,203,885Memory device including mixed non-volatile memory cell types2019 10,170,196Apparatuses and methods to control body potential in 3D non-volatile memory operations2019 10,170,193Apparatus and methods of operating memory for negative gate to body conditions2019 10,170,490Memory device including pass transistors in memory tiers2019 10,170,169Apparatuses and methods involving accessing distributed sub-blocks of memory cells2019 10,163,928Memory having memory cell string and coupling components2018 10,153,043Methods of programming and sensing in a memory device2018 10,127,991Three dimensional memory device with access signal triggering from voltage pump output levels2018 10,121,544Connecting memory cells to a data line sequentially while applying a program voltage to the memory cells2018 10,109,325Interconnections for 3D memory2018 10,102,914Random telegraph signal noise reduction scheme for semiconductor memories2018 10,096,696Field effect transistors having a fin2018 10,090,051Memory array with power-efficient read architecture2018 10,083,265Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information2018 10,079,064Apparatuses and methods using dummy cells programmed to different states2018 10,079,063Apparatuses and methods for charging a global access line prior to accessing a memory2018 10,049,750Methods including establishing a negative body potential in a memory cell2018 10,050,049Apparatuses including memory arrays with source contacts adjacent edges of sources2018 10,014,057Devices including memory arrays, row decoder circuitries and column decoder circuitries2018 9,996,438Chunk redundancy architecture for memory2018 9,953,711Methods of operating memory under erase conditions2018 9,910,594'Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation'2018 9,905,514'Semiconductor device structures including staircase structures, and related methods and electronic systems'2018 9,892,797'Apparatuses and methods for charging a global access line prior to accessing a memory'2018 9,881,651'Interconnections for 3D memory'2018 9,881,686'Apparatuses and methods to control body potential in 3D non-volatile memory operations'2018 9,842,652'Memory array with power-efficient read architecture'2017 9,786,334'Interconnections for 3D memory'2017 9,779,819'Connecting memory cells to a data line sequentially while applying a program voltage to the memory cells'2017 9,778,846'Sequential memory access operations'2017 9,779,791'Apparatuses and methods involving accessing distributed sub-blocks of memory cells'2017 9,780,110'Memory having memory cell string and coupling components'2017 9,773,553'Segmented memory and operation'2017 9,773,564'Memory read apparatus and methods'2017 9,747,991'Random telegraph signal noise reduction scheme for semiconductor memories'2017 9,727,417'Chunk redundancy architecture for memory'2017 9,728,538'Three-dimensional devices having reduced contact length'2017 9,721,960'Data line arrangement and pillar arrangement in apparatuses'2017 9,711,224'Devices including memory arrays, row decoder circuitries and column decoder circuitries'2017 9,711,514'Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate'2017 9,711,228'Apparatus and methods of operating memory with erase de-bias'2017 9,704,876'Semiconductor apparatus with multiple tiers, and methods'2017 9,697,907'Apparatuses and methods using dummy cells programmed to different states'2017 9,646,660'Selectable memory access time'2017 9,641,068'Voltage generator circuit'2017 9,614,516'Devices for shielding a signal line over an active region'2017 9,607,705'Apparatuses and methods for charging a global access line prior to accessing a memory'2017 9,595,533'Memory array having connections going through control gates'2017 9,536,618'Apparatuses and methods to control body potential in memory operations'2017 9,536,582'Enable/disable of memory chunks during memory access'2017 9,437,253'Memory devices having data lines included in top and bottom conductive lines'2016 9,430,417'Sequential memory access operations'2016 9,424,936'Current leakage reduction in 3D NAND memory'2016 9,412,451'Apparatuses and methods using dummy cells programmed to different states'2016 9,401,188'Devices and systems including enabling circuits'2016 9,378,823'Programming a memory cell to a voltage to indicate a data value and after a relaxation time programming the memory cell to a second voltage to indicate the data value'2016 9,368,216'Interconnections for 3D memory'2016 9,349,470'Memory read apparatus and methods'2016 9,343,479'Three-dimensional devices having reduced contact length'2016 9,330,789'Short-checking methods'2016 9,324,443'Compensating for off-current in a memory'2016 9,318,211'Apparatuses and methods including memory array data line selection'2016 9,318,173'Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information'2016 9,305,656'Methods applying a non-zero voltage differential across a memory cell not involved in an access operation'2016 9,299,437'Apparatuses and methods including memory write operation'2016 9,285,997'Independently selective tile group access with data structuring'2016 9,263,461'Apparatuses including memory arrays with source contacts adjacent edges of sources'2016 9,263,460'Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate'2016 9,257,180'Random telegraph signal noise reduction scheme for semiconductor memories'2016 9,224,477'Apparatuses and methods for coupling load current to a common source'2015 9,208,891'Memory array with power-efficient read architecture'2015 9,177,614'Apparatuses and methods including memory with top and bottom data lines'2015 9,171,587'Vertical memory with body connection'2015 9,136,017'Short-checking methods'2015 9,111,591'Interconnections for 3D memory'2015 9,111,620'Memory having memory cell string and coupling components'2015 9,082,485'Apparatuses and methods including memory array and data line architecture'2015 9,064,577'Apparatuses and methods to control body potential in memory operations'2015 9,064,551'Apparatuses and methods for coupling load current to a common source'2015 9,064,578'Enable/disable of memory chunks during memory access'2015 9,064,576'Apparatuses and methods for transposing select gates'2015 9,053,043'Method of error correction of a memory'2015 9,042,180'Charge pump redundancy in a memory'2015 9,030,882'Apparatuses and methods including memory array data line selection'2015 9,025,385'Voltage generation and adjustment in a memory device'2015 9,019,766'Biasing system and method'2015 9,000,836'Voltage generator circuit'2015 8,995,188'Sharing support circuitry in a memory'2015 8,976,594'Memory read apparatus and methods'2015 8,971,117'Apparatus and methods for applying a non-zero voltage differential across a memory cell not involved in an access operation'2015 8,952,482'Three-dimensional devices having reduced contact length'2015 8,891,305'Apparatuses and methods involving accessing distributed sub-blocks of memory cells'2014 8,860,117'Semiconductor apparatus with multiple tiers of memory cells with peripheral transistors, and methods'2014 8,861,274'Compensating for off-current in a memory'2014 8,853,778'Devices for shielding a signal line over an active region'2014 8,837,222'Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate'2014 8,811,084'Memory array with power-efficient read architecture'2014 8,796,778'Apparatuses and methods for transposing select gates'2014 8,797,804'Vertical memory with body connection'2014 8,792,263'Apparatuses and methods including memory with top and bottom data lines'2014 8,780,631'Memory devices having data lines included in top and bottom conductive lines'2014 8,780,638'Random telegraph signal noise reduction scheme for semiconductor memories'2014 8,743,622'Memory devices and programming methods that program a memory cell with a data value, read the data value from the memory cell and reprogram the memory cell with the read data value'2014 8,681,561'Apparatuses and methods including memory write operation'2014 8,675,420'Devices and systems including enabling circuits'2014 8,619,471'Apparatuses and methods including memory array data line selection'2013 8,611,153'Biasing system and method'2013 8,593,869'Apparatuses and methods including memory array and data line architecture'2013 8,547,746'Voltage generation and adjustment in a memory device'2013 8,537,620'Random telegraph signal noise reduction scheme for semiconductor memories'2013 8,466,664'Voltage trimming'2013 8,446,784'Level shifting circuit'2013 8,365,025'Flash memory'2013 8,253,396'Voltage regulator system'2012 8,253,198'Devices for shielding a signal line over an active region'2012 8,208,305'Arrangement of pairs of NAND strings that share bitline contacts while utilizing distinct sources lines'2012 8,194,459'Random telegraph signal noise reduction scheme for semiconductor memories'2012 8,184,489'Level shifting circuit'2012 8,154,922'Semiconductor memory device'2012 8,125,829'Biasing system and method'2012 8,026,702'Voltage regulator system'2011 8,013,579'Voltage trimming'2011 7,957,215'Method and apparatus for generating temperature-compensated read and verify operations in flash memories'2011 7,957,214'Adjustable voltage regulator for providing a regulated output voltage'2011 7,952,933'Semiconductor memory device'2011 7,916,544'Random telegraph signal noise reduction scheme for semiconductor memories'2011 7,908,529'Flash memory'2011 7,902,907'Compensation capacitor network for divided diffused resistors for a voltage divider'2011 7,764,563'Adjustable voltage regulator for providing a regulated output voltage'2010 7,649,780'Semiconductor memory device'2010 7,609,554'High voltage switching circuit'2009 7,535,762'Semiconductor memory device'2009 7,509,566'Flash memory'2009 7,489,556'Method and apparatus for generating read and verify operations in non-volatile memories'2009 7,474,139'Semiconductor integrated circuit device and frequency modulation device'2009 7,349,259'Semiconductor memory device'2008 7,336,545'Semiconductor device having switch circuit to supply voltage'2008 7,277,355'Method and apparatus for generating temperature-compensated read and verify operations in flash memories'2007 7,272,046'High voltage switching circuit'2007 7,233,190'Voltage subtracting circuit carrying out voltage subtraction by converting input voltage into current, intensity detecting circuit, and semiconductor integrated circuit device using the same'2007 7,219,285'Flash memory'2007 7,203,120'Boosted voltage generating circuit and semiconductor memory device having the same'2007 7,180,796'Boosted voltage generating circuit and semiconductor memory device having the same'2007 7,148,734'Analog level shifter'2006 7,071,771'Current difference divider circuit'2006 7,061,807'Semiconductor memory device'2006 7,050,339'Semiconductor device having switch circuit to supply voltage'2006 7,005,936'Direct frequency modulation apparatus which modulates frequency by applying data-dependent voltage to control terminal of voltage-controlled oscillator without mediacy of PLL, and communication system'2006 6,999,365'Semiconductor memory device and current mirror circuit'2006 6,996,024'Boosted voltage generating circuit and semiconductor memory device having the same'2006 6,977,850'Semiconductor device having switch circuit to supply voltage'2005 6,868,013'Semiconductor memory device'2005 6,865,125'Non-volatile semiconductor memory'2005 6,856,548'Nonvolatile semiconductor memory'2005 6,850,437'Nonvolatile semiconductor memory device and method of retrieving faulty in the same'2005 6,842,377'Nonvolatile semiconductor memory device with first and second read modes'2005 6,826,068'Fast data readout semiconductor storage apparatus'2004 6,816,421'Nonvolatile semiconductor memory'2004 6,816,413'Nonvolatile semiconductor memory capable of generating read-mode reference current and verify-mode reference current from the same reference cell'2004 6,807,097'Non-volatile semiconductor memory device'2004 6,801,457'Non-volatile semiconductor memory'2004 6,795,352'Nonvolatile semiconductor memory having page mode with a plurality of banks'2004 6,788,601'Semiconductor memory device and current mirror circuit'2004 6,781,879'Nonvolatile semiconductor memory with a page mode'2004 6,781,439'Memory device pump circuit with two booster circuits'2004 6,771,547'Boosted voltage generating circuit and semiconductor memory device having the same'2004 6,762,956'High-speed data programmable nonvolatile semiconductor memory device'2004 6,734,719'Constant voltage generation circuit and semiconductor memory device'2004 6,711,066'Nonvolatile semiconductor memory'2004 6,711,057'Nonvolatile semiconductor memory device and method of retrieving faulty in the same'2004 6,693,818'Semiconductor storage apparatus'2004 6,671,203'Nonvolatile semiconductor memory having page mode with a plurality of banks'2003 6,650,570'Non-volatile semiconductor memory'2003 6,643,183'Channel-erase nonvolatile semiconductor memory device'2003 6,639,837'Non-volatile semiconductor memory device'2003 6,621,738'Semiconductor memory device'2003 6,614,699'Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases'2003 6,611,938'Flash memory'2003 6,605,986'Boosted voltage generating circuit and semiconductor memory device having the same'2003 6,600,692'Semiconductor device with a voltage regulator'2003 6,600,679'Level shifter for converting a voltage level and a semiconductor memory device having the level shifter'2003 6,577,538'Channel-erase nonvolatile semiconductor memory device'2003 6,567,309'Semiconductor device'2003 6,552,936'Semiconductor storage apparatus'2003 6,545,909'Nonvolatile semiconductor memory device'2003 6,535,427'Nonvolatile semiconductor memory device with initialization circuit and control method thereof'2003 6,525,964'Semiconductor memory device'2003 6,487,120'Boosted voltage generating circuit and semiconductor memory device having the same'2002 6,456,541'Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases'2002 6,445,618'Channel-erase nonvolatile semiconductor memory device'2002 6,442,080'Nonvolatile semiconductor memory'2002 6,438,034'Semiconductor device'2002 6,434,054'Non-volatile semiconductor memory device controlling the range of distribution of memory cell threshold voltages'2002 6,429,725'Pump circuit with active-mode and stand-by mode booster circuits'2002 6,373,749'Channel-erase nonvolatile semiconductor memory device'2002 6,363,010'Nonvolatile semiconductor memory device'2002 6,351,417'Non-volatile semiconductor memory device having a function for controlling the range of distribution of memory cell threshold voltages and method of erasing data thereof'2002 6,344,996'Semiconductor memory device'2002 6,344,764'Semiconductor integrated circuit device'2002 6,337,825'Semiconductor memory device'2002 6,320,220'Quantum tunneling effect device and semiconductor composite substrate'2001 6,282,117'Nonvolatile semiconductor memory device'2001 6,278,316'Pump circuit with reset circuitry'2001 6,256,227'Non-volatile semiconductor memory having column sub-selector layout pattern adaptable to miniaturization of memory cell'2001 6,252,798'Nonvolatile semiconductor memory device capable of controlling mutual timing of write voltage pulse and transfer voltage pulse'2001 6,249,479'Semiconductor memory device'2001 6,240,019'Non-volatile semiconductor memory device having a function for controlling the range of distribution of memory cell threshold voltages'2001 6,236,609'Nonvolatile semiconductor memory'2001 6,233,189'Semiconductor memory device'2001 6,222,774'Data-erasable non-volatile semiconductor memory device'2001 6,208,573'Semiconductor memory device'2001 6,188,611'Non-volatile semiconductor memory device'2001 6,154,403'Semiconductor memory device'2000 6,141,277'Semiconductor memory preventing sense amplifier malfunctions due to effects of noise generated in output buffer'2000 6,111,288'Quantum tunneling effect device and semiconductor composite substrate'2000 6,084,799'Nonvolatile semiconductor memory having improved source line drive circuit'2000 6,072,719'Semiconductor memory device'2000 6,064,611'Semiconductor memory device'2000 6,044,013'Nonvolatile semiconductor memory device'2000 6,014,330'Non-volatile semiconductor memory device'2000 5,996,108'Memory system'1999 5,969,557'Delay circuit, oscillation circuit and semiconductor memory device'1999 5,969,985'Nonvolatile semiconductor memory device'1999 5,969,988'Voltage multiplier circuit and nonvolatile semiconductor memory device having voltage multiplier'1999 5,946,231'Non-volatile semiconductor memory device'1999 5,933,436'Error correction/detection circuit and semiconductor memory device using the same'1999 5,909,398'Semiconductor memory device and high-voltage switching circuit'1999 5,905,691'Semiconductor memory'1999 5,901,152'Three-value data storing semiconductor memory system'1999 5,864,504'Nonvolatile semiconductor memory with temperature compensation for read/verify referencing scheme'1999 5,828,621'Semiconductor memory device and high-voltage switching circuit'1998 5,774,397'Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state'1998 5,719,888'Memory system'1998 5,708,606'Semiconductor memory device and high-voltage switching circuit'1998 5,706,241'Eeprom semiconductor memory device including circuit for generating a voltage higher than a power supply voltage'1998 5,627,488'Delay circuit, oscillation circuit and semiconductor memory device'1997 5,621,682'Memory system'1997 5,555,204'Non-volatile semiconductor memory device'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2015Patents assigned to TOSHIBA KK (109)· patent assignee history

1996–2015Based in Ebina, JP· patent location history

1999Based in Kanagawa, JP· patent location history

2004–2021Based in Tokyo, JP· patent location history

2007–2021Patents assigned to MICRON TECHNOLOGY INC (158)· patent assignee history

2012–2017Patents assigned to TANZAWA TORU (38)· patent assignee history

2012–2019Patents assigned to INTEL CORP (11)· patent assignee history

2012–2015Patents assigned to TANAKA TOMOHARU (4)· patent assignee history

2014–2021Based in Kita-adachi-gun, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MICRON TECHNOLOGY INC	158	2007–2021
TOSHIBA KK	109	1996–2015
TANZAWA TORUself	38	2012–2017
INTEL CORP	11	2012–2019
TANAKA TOMOHARU	4	2012–2015

Locations

Location	Patents	Span
Tokyo, JP	144	2004–2021
Ebina, JP	98	1996–2015
Kita-adachi-gun, JP	36	2014–2021
Kanagawa, JP	1	1999