Inventor
CHIA-TIEN WU
Inventor
TW
Overview
Patents· 52 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices33%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1033%
H10DInorganic electric semiconductor devices17%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G11CStatic stores2%
H10BElectronic memory devices2%
G06FElectric digital data processing1%
PatentTitleYear
12,581,934Semiconductor structure and manufacturing method thereof202612,575,397Metal lines of hybrid heights202612,494,411Integrated circuit and method of forming the same202512,476,197Semiconductor device202512,417,980First metal structure, layout, and method202512,412,804Semiconductor structure with improved heat dissipation202512,400,964Integrated circuit202512,394,633Method of fabricating semiconductor device with reduced trench distortions202512,388,016Deep lines and shallow lines in signal conducting paths202512,388,009Semiconductor device including structure connecting frontside and backside metal and method of manufacturing the same202512,381,145Signal conducting line arrangements in integrated circuits202512,368,106Diagonal vias in semiconductor structures202512,300,623Integrated circuit202512,283,586Integrated circuit device, method and system202512,283,477Method of manufacturing a semiconductor device202512,278,143Method of providing a workpiece including low resistance interconnect low-resistance interconnect202512,230,534Semiconductor device and method of manufacture202512,183,671Hybrid metal line structure202412,125,795Integrated chip with inter-wire cavities202412,094,816Semiconductor structure having deep metal line and method for forming the semiconductor structure202412,080,593Barrier-less structures202412,062,652Zero mask high density capacitor202412,058,852Semiconductor device and method of operating the same202412,002,709Interconnect structure and manufacturing method for the same202411,984,359Semiconductor device with spacers for self aligned vias202411,984,355Method for manufacturing an interconnection structure having a bottom via spacer202411,967,560Integrated circuit202411,923,306Semiconductor structure having air gaps and method for manufacturing the same202411,923,273Method of manufacturing a semiconductor device202411,916,017Signal conducting line arrangements in integrated circuits202411,916,077Method for routing local interconnect structure at same level as reference metal line202411,894,238Method of fabricating semiconductor device with reduced trench distortions202411,854,786Deep lines and shallow lines in signal conducting paths202311,848,190Barrier-less structures202311,842,967Semiconductor devices with backside power distribution network and frontside through silicon via202311,842,966Integrated chip with inter-wire cavities202311,817,392Integrated circuit202311,769,695Semiconductor structure including low-resistance interconnect and integrated circuit device having the same202311,764,106Semiconductor device and method of manufacture202311,729,969Semiconductor device and method of operating the same202311,715,636Method of manufacturing a semiconductor device202311,682,618Hybrid metal line structure202311,640,924Structure and method for interconnection with self-alignment202311,637,064Advanced metal connection with metal cut202311,581,298Zero mask high density capacitor202311,488,861Method for manufacturing an interconnect structure having a selectively formed bottom via202211,482,473Semiconductor device, and associated method and system202211,387,113Method of fabricating semiconductor device with reduced trench distortions202211,264,277Semiconductor device with spacers for self aligned vias202211,257,673Dual spacer metal patterning202211,257,670Method of manufacturing a semiconductor device, and associated semiconductor device and system202211,158,580Semiconductor devices with backside power distribution network and frontside through silicon via2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (52)· patent assignee history
2021–2026Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 52 | 2021–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 52 | 2021–2026 |