Inventor
Mark L. Neidengard
Inventor
Beaverton, OR, US
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique41%
G06FElectric digital data processing21%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses18%
H03MCoding6%
H04LTransmission of digital information, e.g. telegraphic communication6%
G09GArrangements or circuits for control of indicating devices using static means to present variable information3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner3%
PatentTitleYear
10,824,764Apparatus for autonomous security and functional safety of clock and voltages202010,790,832Apparatus to improve lock time of a frequency locked loop202010,790,838Method and apparatus to perform dynamic frequency scaling while a phase-locked loop operates in a closed loop202010,439,617Bidirectional gray code counter201910,320,395Cascaded counter circuit with pipelined reload of variable ratio determined values20199,876,491Apparatus, system, and method for re-synthesizing a clock signal20189,836,078Clock generation system with dynamic distribution bypass mode20179,698,764'Quadrature divider'20179,450,589'Clock generation system with dynamic distribution bypass mode'20169,438,219'Hybrid digital pulse width modulation (PWM) based on phases of a system clock'20169,190,991'Apparatus, system, and method for re-synthesizing a clock signal'20158,756,451'Frequency synthesis methods and systems'20147,679,404'Missing clock pulse detector'20107,667,507'Edge-timing adjustment circuit'20107,405,631'Oscillating divider topology'20087,049,865'Power-on detect circuit for use with multiple voltage domains'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2020Patents assigned to INTEL CORP (16)· patent assignee history
2006–2010Based in Hillsboro, OR, US· patent location history
2014–2017Patents assigned to NEIDENGARD MARK L (3)· patent assignee history
2014Patents assigned to GREINER ROBERT J (1)· patent assignee history
2014–2020Based in Beaverton, OR, US· patent location history
2015Patents assigned to GROSSNICKLE VAUGHN (1)· patent assignee history
2016Patents assigned to DARNES JAMES ALEXANDER (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 16 | 2006–2020 |
| NEIDENGARD MARK Lself | 3 | 2014–2017 |
| DARNES JAMES ALEXANDER | 1 | 2016 |
| GREINER ROBERT J | 1 | 2014 |
| GROSSNICKLE VAUGHN | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Beaverton, OR, US | 12 | 2014–2020 |
| Hillsboro, OR, US | 4 | 2006–2010 |