Inventor
Jeffrey Chee
Inventor
Singapore, SG
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices31%
H01LSemiconductor devices14%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H10BElectronic memory devices6%
Y10TTechnical subjects covered by former us classification6%
A47GHousehold or table equipment3%
E05CBolts or fastening devices for wings, specially for doors or windows3%
E06BFixed or movable closures for openings in buildings, vehicles, fences or like enclosures in general, e.g. doors, windows, blinds, gates3%
G06FElectric digital data processing3%
PatentTitleYear
11,037,821Multiple patterning with self-alignment provided by spacers202110,825,811Gate cut first isolation formation with contact forming process mask protection202010,446,483Metal-insulator-metal capacitors with enlarged contact areas201910,347,531Middle of the line (MOL) contact formation method and structure201910,026,818Field effect transistor structure with recessed interlayer dielectric and method20188,716,081'Capacitor top plate over source/drain to form a 1T memory device'20148,274,115'Hybrid orientation substrate with stress layer'20128,053,327'Method of manufacture of an integrated circuit system with self-aligned isolation structures'20117,999,300'Memory cell structure and method for fabrication thereof'20117,932,178'Integrated circuit having a plurality of MOSFET devices'20117,101,746'Method to lower work function of gate electrode through Ge implantation'2006D0519564'Clip and cover'20066,872,608'Method to selectively form poly SiGe P type electrode and polysilicon N type electrode through planarization'20056,099,928'Multipurpose transparency mat cards'20004,486,042'Gate latch'1984Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1984–2014Patents assigned to CHEE JEFFREY (3)· patent assignee history
1984Based in Queens, NY, US· patent location history
2000Based in Kaneohe, HI, US· patent location history
2005–2006Patents assigned to CHARTERED SEMICONDUCTOR MFG (2)· patent assignee history
2005–2014Based in Singapore, SG· patent location history
2006Based in Mililani, HI, US· patent location history
2011–2014Patents assigned to GLOBALFOUNDRIES SG PTE LTD (5)· patent assignee history
2012–2014Patents assigned to LAI CHUNG WOH (2)· patent assignee history
2018–2020Patents assigned to GLOBALFOUNDRIES INC (4)· patent assignee history
2018–2021Based in Ballston Lake, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES SG PTE LTD | 5 | 2011–2014 |
| GLOBALFOUNDRIES INC | 4 | 2018–2020 |
| CHEE JEFFREYself | 3 | 1984–2014 |
| CHARTERED SEMICONDUCTOR MFG | 2 | 2005–2006 |
| LAI CHUNG WOH | 2 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Singapore, SG | 7 | 2005–2014 |
| Ballston Lake, New York, US | 5 | 2018–2021 |
| Mililani, HI, US | 1 | 2006 |
| Kaneohe, HI, US | 1 | 2000 |
| Queens, New York, US | 1 | 1984 |