Inventor

Stalinselvaraj Jeyasingh

Inventor

Beaverton, OR, US

Overview

2005–2021

Patent span

Physics

Primary field (CPC G)

Patents· 35 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing100%

PatentTitleYear

11,016,833Remote debug for scaled computing environments2021 10,885,202Method and apparatus to provide secure application execution2021 10,102,380Method and apparatus to provide secure application execution2018 9,971,615Optimizing processor-managed resources based on the behavior of a virtual machine monitor2018 9,898,307'Starting application processors of a virtual machine'2018 9,087,200'Method and apparatus to provide secure application execution'2015 8,751,752'Invalidating translation lookaside buffer entries in a virtual machine system'2014 8,561,068'Optimizing processor-managed resources based on the behavior of a virtual machine monitor'2013 8,543,772'Invalidating translation lookaside buffer entries in a virtual machine (VM) system'2013 8,079,034'Optimizing processor-managed resources based on the behavior of a virtual machine monitor'2011 7,886,293'Optimizing system behavior in a virtual machine environment'2011 7,865,670'Invalidating translation lookaside buffer entries in a virtual machine (VM) system'2011 7,861,245'Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment'2010 7,818,808'Processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor'2010 7,793,286'Methods and systems to manage machine state in virtual machine operations'2010 7,757,231'System and method to deprivilege components of a virtual machine monitor'2010 7,620,949'Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment'2009 7,424,709'Use of multiple virtual machine monitors to handle privileged events'2008 7,356,735'Providing support for single stepping a virtual machine in a virtual machine environment'2008 7,318,141'Methods and systems to control virtual machines'2008 7,313,669'Virtual translation lookaside buffer'2007 7,305,592'Support for nested fault in a virtual machine environment'2007 7,302,511'Chipset support for managing hardware interrupts in a virtual machine system'2007 7,287,197'Vectoring an interrupt or exception upon resuming operation of a virtual machine'2007 7,272,831'Method and apparatus for constructing host processor soft devices independent of the host processor operating system'2007 7,237,051'Mechanism to control hardware interrupt acknowledgement in a virtual machine system'2007 7,225,441'Mechanism for providing power management through virtualization'2007 7,191,440'Tracking operating system process and thread execution and virtual machine execution in hardware or in a virtual machine monitor'2007 7,177,967'Chipset support for managing hardware interrupts in a virtual machine system'2007 7,127,548'Control register access virtualization performance improvement in the virtual-machine architecture'2006 7,124,327'Control over faults occurring during the operation of guest software in the virtual-machine architecture'2006 7,073,042'Reclaiming existing fields in address translation data structures to extend control over memory accesses'2006 7,035,963'Method for resolving address space conflicts between a virtual machine monitor and a guest operating system'2006 6,996,748'Handling faults associated with operation of guest software in the virtual-machine architecture'2006 6,907,600'Virtual translation lookaside buffer'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2021Patents assigned to INTEL CORP (35)· patent assignee history

2005–2021Based in Portland, OR, US· patent location history

2007–2021Based in Beaverton, OR, US· patent location history

2011–2015Patents assigned to JEYASINGH STALINSELVARAJ (4)· patent assignee history

2011–2015Patents assigned to NEIGER GILBERT (4)· patent assignee history

2011–2013Patents assigned to UHLIG RICHARD (3)· patent assignee history

2011–2013Patents assigned to ANDERSON ANDREW V (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	35	2005–2021
JEYASINGH STALINSELVARAJself	4	2011–2015
NEIGER GILBERT	4	2011–2015
UHLIG RICHARD	3	2011–2013
ANDERSON ANDREW V	2	2011–2013

Locations

Location	Patents	Span
Beaverton, OR, US	19	2007–2021
Portland, OR, US	16	2005–2021