Inventor

Fedor G. Pikus

Inventor
Beaverton, OR, US

Overview

24→
Patents
2007–2021
Patent span
Physics
Primary field (CPC G)

Patents· 24 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing45%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices12%
H04LTransmission of digital information, e.g. telegraphic communication10%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes7%
Y02PClimate change mitigation technologies in the production or processing of goods7%
H01LSemiconductor devices5%
H10DInorganic electric semiconductor devices5%
A61KPreparations for medical, dental or toiletry purposes2%
G05BControl or regulating systems in general2%
G06NComputing arrangements based on specific computational models2%
PatentTitleYear
10,908,511Systems and methods for patterning color assignment202110,895,864Fabric-independent multi-patterning202110,872,191Invariant property-based clustering of circuit images for electronic design automation (EDA) applications202010,846,448Limited basis quantum particle definitions in applications of quantum computing to electronic design automation processes202010,789,408Systems and methods for photolithographic design202010,643,015Properties in electronic design automation202010,596,219Logic-driven layout verification202010,552,565Simultaneous multi-layer fill generation202010,311,197Preserving hierarchy and coloring uniformity in multi-patterning layout design201910,210,302Electrostatic damage protection circuitry verification20199,940,428Hierarchical fill in a design layout20189,729,317'Optical physical uncloneable function'20179,652,581'Directed self-assembly-aware layout decomposition for multiple patterning'20179,652,574'Simultaneous multi-layer fill generation'20179,507,902'Simultaneous multi-layer fill generation'20168,751,981'Logic injection'20148,612,919'Model-based design verification'20138,504,949'Hybrid hotspot detection'20138,302,039'Secure exchange of information in electronic design automation'20128,225,246'Logic injection'20127,716,611'Logic injection'20107,698,664'Secure exchange of information in electronic design automation'20107,353,468'Secure exchange of information in electronic design automation'20087,222,312'Secure exchange of information in electronic design automation'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2020Patents assigned to PIKUS FEDOR G (11)· patent assignee history
2007–2017Patents assigned to GRODD LAURENCE W (5)· patent assignee history
2007–2012Patents assigned to FERGUSON JOHN G (4)· patent assignee history
2007–2012Patents assigned to SAKAJIRI KYOHEI (4)· patent assignee history
2007–2021Based in Beaverton, OR, US· patent location history
2010–2021Patents assigned to MENTOR GRAPHICS CORP (20)· patent assignee history
2012Based in Bearverton, OR, US· patent location history
2013Based in Bellevue, WA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MENTOR GRAPHICS CORP202010–2021
PIKUS FEDOR Gself112007–2020
GRODD LAURENCE W52007–2017
FERGUSON JOHN G42007–2012
SAKAJIRI KYOHEI42007–2012
Locations
LocationPatentsSpan
Beaverton, OR, US222007–2021
Bellevue, Washington, US12013
Bearverton, OR, US12012