Inventor
Hiroyuki Igura
Inventor
Tokyo, JP
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing29%
H04LTransmission of digital information, e.g. telegraphic communication16%
H03KPulse technique8%
H03MCoding8%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses5%
H04BTransmission5%
G01SRadio direction-finding3%
G06GAnalogue computers3%
G06TImage data processing or generation, in general3%
G11CStatic stores3%
PatentTitleYear
10,693,227Patch array antenna, directivity control method therefor and wireless device using patch array antenna202010,359,503Position estimation apparatus, position estimation system, position estimation method and recording medium for position estimation20199,787,297'Signal generator, signal generation method, and numerically controlled oscillator'20179,703,559'Digital signal processor, program control method, and control program'20179,692,466'Radio reception circuit, radio reception method, and radio reception program'20179,673,780'Multi-stage filter processing device and method'20179,405,549'Deadlock avoidance method and deadlock avoidance mechanism'20169,383,994'Co-processor for complex arithmetic processing, and processor system'20169,164,951'Multiprocessor system, execution control method and execution control program'20159,043,806'Information processing device and task switching method'20158,989,242'Encoding/decoding processor and wireless communication apparatus'20158,817,901'Channel estimate interpolation circuit and method'20148,819,096'FFT computing apparatus and power computing method'20148,775,750'Interleaver with parallel address queue arbitration dependent on which queues are empty'20148,583,845'Multi-processor system and controlling method thereof'20138,553,811'Likelihood value calculation device, likelihood value calculation method, and radio system'20138,341,394'Data encryption/decryption method and data processing device'20127,165,133'Multiprocessor system having shared buses, prioritized arbitration, and clock synchronization circuitry'20077,051,183'Circuit for recording digital waveform data and method of doing the same'20066,757,813'Processor'20046,205,192'Clock input control circuit'20016,066,988'Phase locked loop circuit with high stability having a reset signal generating circuit'20005,687,107'Exclusive-OR gate, an inverted type selector, and adders'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2020Patents assigned to NEC CORP (23)· patent assignee history
1997–2020Based in Tokyo, JP· patent location history
2012–2017Patents assigned to IGURA HIROYUKI (12)· patent assignee history
2012–2016Patents assigned to TAKEUCHI TOSHIKI (5)· patent assignee history
2012Based in Minato-ku, JP· patent location history
2014Patents assigned to CHONG SHENG WEI (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NEC CORP | 23 | 1997–2020 |
| IGURA HIROYUKIself | 12 | 2012–2017 |
| TAKEUCHI TOSHIKI | 5 | 2012–2016 |
| CHONG SHENG WEI | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 22 | 1997–2020 |
| Minato-ku, JP | 1 | 2012 |