Inventor
Hidetoshi Nishimura
Inventor
Osaka, JP
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices36%
H01LSemiconductor devices14%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
A61BDiagnosis6%
G02CSpectacles5%
A61PSpecific therapeutic activity of chemical compounds or medicinal preparations3%
B24BMachines, devices, or processes for grinding or polishing3%
C07DHeterocyclic compounds3%
H03KPulse technique3%
H04NPictorial communication, e.g. television3%
PatentTitleYear
10,754,425Information processing apparatus, information processing method, and non-transitory computer readable recording medium202010,593,702Semiconductor device202010,549,398Block device, spectacle lens manufacturing method, and program202010,083,985Semiconductor device20189,967,555Simulation device20189,741,740'Semiconductor device'20179,733,490'Spectacle lens design system, supply system, design method and manufacturing method'20179,618,772'Spectacle lens design system, supply system, design method and manufacturing method'20179,610,667'Lens edgeing system, method of detecting a tool exchange time and method of manufacturing spectacle lens'20179,373,611'Semiconductor integrated circuit device'20169,362,264'Semiconductor device comprising a plurality of cell arrays including a well potential supply region and adjacent dummy gates provided on a well region of a cell array'20169,346,783'Method and apparatus for producing oxidized compound'20169,147,652'Layout structure of standard cell, standard cell library, and layout structure of semiconductor integrated circuit'20158,946,826'Semiconductor device'20158,841,774'Semiconductor device including a first wiring having a bending portion a via'20148,766,322'Layout structure of standard cell, standard cell library, and layout structure of semiconductor integrated circuit'20148,698,273'Semiconductor integrated circuit device having improved interconnect accuracy near cell boundaries'20148,692,336'Semiconductor device'20148,648,392'Semiconductor integrated circuit'20148,592,598'Method of producing a crystal of an imidazole compound'20138,426,978'Semiconductor device including a first wiring having a bending portion and a via including the bending portion'20138,368,225'Semiconductor integrated circuit device having improved interconnect accuracy near cell boundaries'20138,159,013'Semiconductor integrated circuit device having a dummy metal wiring line'20128,143,724'Standard cell and semiconductor device including the same'20128,022,549'Standard cell and semiconductor device including the same'20118,004,014'Semiconductor integrated circuit device having metal interconnect regions placed symmetrically with respect to a cell boundary'20117,932,610'Semiconductor integrated circuit having improved power supply wiring'20117,923,755'Semiconductor integrated circuit and method of designing semiconductor integrated circuit'20117,859,023'Standard cell and semiconductor device including the same'20107,800,151'Semiconductor integrated circuit and method of designing semiconductor integrated circuit'20107,800,140'Semiconductor integrated circuit'20107,619,684'Camera module, manufacturing method of camera module, electronic apparatus, and manufacturing method of electronic apparatus'20097,514,795'Semiconductor integrated circuit having improved power supply wiring'20096,791,391'Level shifting circuit'20045,761,337'Method and apparatus for inspection of the appearance of bumps'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2020Based in Osaka, JP· patent location history
2009–2016Patents assigned to PANASONIC CORP (20)· patent assignee history
2012–2016Patents assigned to NISHIMURA HIDETOSHI (9)· patent assignee history
2012–2014Patents assigned to TAMARU MASAKI (4)· patent assignee history
2013Based in Hikari, JP· patent location history
2015–2020Patents assigned to SOCIONEXT INC (6)· patent assignee history
2016Based in Yamaguchi, JP· patent location history
2017–2018Patents assigned to HOYA CORP (4)· patent assignee history
2017–2020Based in Tokyo, JP· patent location history
2020Based in Koganei, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| PANASONIC CORP | 20 | 2009–2016 |
| NISHIMURA HIDETOSHIself | 9 | 2012–2016 |
| SOCIONEXT INC | 6 | 2015–2020 |
| HOYA CORP | 4 | 2017–2018 |
| TAMARU MASAKI | 4 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Osaka, JP | 25 | 2004–2020 |
| Tokyo, JP | 5 | 2017–2020 |
| Koganei, JP | 1 | 2020 |
| Yamaguchi, JP | 1 | 2016 |
| Hikari, JP | 1 | 2013 |