Inventor
Amrita Mathuriya
Inventor
Portland, OR, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores21%
G06FElectric digital data processing18%
G06NComputing arrangements based on specific computational models14%
H01LSemiconductor devices10%
H03KPulse technique10%
H10BElectronic memory devices7%
H10DInorganic electric semiconductor devices7%
G06GAnalogue computers4%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
11,061,646Compute in memory circuits with multi-Vdd arrays and/or analog multipliers202111,048,434Compute in memory circuits with time-to-digital computation202111,043,4723D integrated ultra high-bandwidth memory202111,025,254Linear input and non-linear output threshold logic gate202111,018,672Linear input and non-linear output majority logic gate202111,016,701Oscillator circuitry to facilitate in-memory computation202111,012,076Linear input and non-linear output majority logic gate with and/or function202110,956,813Compute-in-memory circuit having a multi-level read wire with isolated voltage distributions202110,951,213Majority logic gate fabrication202110,944,404Low power ferroelectric based majority logic gate adder202110,884,957Pipeline circuit architecture to provide in-memory computation functionality202110,877,752Techniques for current-sensing circuit design for compute-in-memory202010,860,682Binary, ternary and bit serial compute-in-memory circuits202010,831,446Digital bit-serial multi-multiply-and-accumulate compute in memory202010,825,509Full-rail digital read compute-in-memory circuit202010,748,603In-memory multiply and accumulate with global charge-sharing202010,705,967Programmable interface to in-memory cache processor202010,642,922Binary, ternary and bit serial compute-in-memory circuits202010,565,138Memory device with multiple memory arrays to facilitate in-memory computation2020Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2020–2021Patents assigned to INTEL CORP (13)· patent assignee history
2020Patents assigned to CHEN GREGORY K (1)· patent assignee history
2020Patents assigned to KNAG PHIL (1)· patent assignee history
2020–2021Based in Portland, OR, US· patent location history
2021Patents assigned to KEPLER COMPUTING INC (6)· patent assignee history
2021Patents assigned to KEPLER COMPUTE INC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 13 | 2020–2021 |
| KEPLER COMPUTING INC | 6 | 2021 |
| CHEN GREGORY K | 1 | 2020 |
| KEPLER COMPUTE INC | 1 | 2021 |
| KNAG PHIL | 1 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Portland, OR, US | 19 | 2020–2021 |