Inventor
David L. Edwards
Inventor
Poughkeepsie, NY, US
Overview
Patents· 62 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1038%
H05KPrinted circuits17%
Y10TTechnical subjects covered by former us classification14%
F28FDetails of heat-exchange and heat-transfer apparatus, of general application5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
B23KSoldering or unsoldering2%
F04DNon-positive-displacement pumps2%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
Y02PClimate change mitigation technologies in the production or processing of goods2%
G06FElectric digital data processing2%
PatentTitleYear
10,997,534System and method for connecting an operator with worksite operations202110,921,139System and method for controlling machines using operator alertness metrics202110,660,239Cooling system with integrated fill and drain pump20209,918,409'Cooling system with integrated fill and drain pump'20189,861,013'Cooling system with integrated fill and drain pump'20189,743,562'Liquid-cooled heat sink configured to facilitate drainage'20179,743,561'Liquid-cooled heat sink configured to facilitate drainage'20179,537,237'System to improve an in-line memory module'20179,420,728'Liquid-cooled heat sink configured to facilitate drainage'20168,582,297'Customized thermal interface to optimize mechanical loading and thermal conductivity characteristics'20138,531,025'Thermal paste containment for semiconductor modules'20138,248,805'System to improve an in-line memory module'20128,046,616'Controlling power change for a semiconductor module to preserve thermal interface therein'20118,021,925'Thermal paste containment for semiconductor modules'20117,900,809'Solder interconnection array with optimal mechanical integrity'20117,733,655'Lid edge capping load'20107,724,527'Method and structure to improve thermal dissipation from semiconductor devices'20107,709,951'Thermal pillow'20107,687,894'IC chip package having automated tolerance compensation'20107,518,235'Method and structure to provide balanced mechanical loading of devices in compressively loaded environments'20097,468,886'Method and structure to improve thermal dissipation from semiconductor devices'20087,464,462'Method of forming anisotropic heat spreading apparatus for semiconductor devices'20087,445,141'Solder interconnection array with optimal mechanical integrity'20087,440,281'Thermal interface apparatus'20087,394,666'Circuit board cam-action standoff connector'20087,376,852'Method for controlling power change for a semiconductor module'20087,328,508'Anisotropic heat spreading apparatus and method for semiconductor devices'20087,268,428'Thermal paste containment for semiconductor modules'20077,250,576'Chip package having chip extension and method'20077,239,516'Flexure plate for maintaining contact between a cooling plate/heat sink and a microchip'20077,086,896'Expandable standoff connector with slit collar and related method'20067,079,393'Fluidic cooling systems and methods for electronic components'20066,451,155'Method using a thin adhesion promoting layer for bonding silicone elastomeric material to nickel and use thereof in making a heat sink assembly'20026,444,496'Thermal paste preforms as a heat transfer media between a chip and a heat sink and method thereof'20026,444,082'Apparatus and method for removing a bonded lid from a substrate'20026,436,223'Process and apparatus for improved module assembly using shape memory alloy springs'20026,373,133'Multi-chip module and heat-sink cap combination'20026,365,977'Insulating interposer between two electronic components and process thereof'20026,294,408'Method for controlling thermal interface gap distance'20016,292,369'Methods for customizing lid for improved thermal performance of modules using flip chips'20016,291,267'Process for underfilling chip-under-chip semiconductor modules'20016,275,381'Thermal paste preforms as a heat transfer media between a chip and a heat sink and method thereof'20016,255,139'Method for providing a thermal path through particles embedded in a thermal cap'20016,239,484'Underfill of chip-under-chip semiconductor modules'20016,214,647'Method for bonding heatsink to multiple-height chip'20016,111,314'Thermal cap with embedded particles'20006,091,603'Customizable lid for improved thermal performance of modules using flip chips'20005,981,310'Multi-chip heat-sink cap assembly'19995,982,038'Cast metal seal for semiconductor substrates'19995,977,625'Semiconductor package with low strain seal'19995,931,222'Adhesion promoting layer for bonding polymeric adhesive to metal and a heat sink assembly using same'19995,891,755'Process for flat plate cooling a semiconductor chip using a thermal paste retainer'19995,881,944'Multi-layer solder seal band for semiconductor substrates'19995,881,945'Multi-layer solder seal band for semiconductor substrates and process'19995,821,161'Cast metal seal for semiconductor substrates and process thereof'19985,819,402'Method for cooling of chips using blind holes with customized depth'19985,757,620'Apparatus for cooling of chips using blind holes with customized depth'19985,724,729'Method and apparatus for cooling of chips using a plurality of customized thermally conductive materials'19985,723,905'Semiconductor package with low strain seal'19985,706,171'Flat plate cooling using a thermal paste retainer'19985,623,394'Apparatus for cooling of chips using a plurality of customized thermally conductive materials'19975,604,978'Method for cooling of chips using a plurality of materials'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2020Patents assigned to IBM (59)· patent assignee history
1997–2020Based in Poughkeepsie, NY, US· patent location history
2012–2013Patents assigned to EDWARDS DAVID L (3)· patent assignee history
2012–2013Patents assigned to KEMINK RANDALL G (2)· patent assignee history
2012–2013Patents assigned to TOROK JOHN G (2)· patent assignee history
2021Patents assigned to CATERPILLAR INC (2)· patent assignee history
2021Based in Dunlap, IL, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 59 | 1997–2020 |
| EDWARDS DAVID Lself | 3 | 2012–2013 |
| CATERPILLAR INC | 2 | 2021 |
| KEMINK RANDALL G | 2 | 2012–2013 |
| TOROK JOHN G | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Poughkeepsie, New York, US | 60 | 1997–2020 |
| Dunlap, Illinois, US | 2 | 2021 |