Inventor
Hongjiang Song
Inventor
Chandler, AZ, US
Overview
Patents· 36 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication25%
H03KPulse technique17%
G06FElectric digital data processing12%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses10%
H03FAmplifiers7%
H03HImpedance networks, e.g. resonant circuits6%
H04BTransmission4%
H03CModulation3%
H03GControl of amplification3%
H03MCoding3%
PatentTitleYear
10,585,812Multi-standard single interface with reduced I/O count202010,469,214Clock recovery circuit and method of operating same201910,437,744Reconfigurable camera serial interface201910,164,635Low voltage transmitter with variable output swing20189,548,734'Smart impedance matching for high-speed I/O'20179,537,479'Programmable impedance transmitter for serial communication'20179,363,070'Low power squelch circuit'20169,350,528'Low power digital phase interpolator'20169,252,743'Distributed polyphase filter'20169,184,712'Low power high-speed digital receiver'20158,982,939'Low power digital phase interpolator'20158,810,304'Adaptive power gating and regulation'20148,194,811'Clock repeater and phase-error correcting circuit'20127,991,103'Systems and methods for data recovery in an input circuit receiving digital data at a high rate'20117,792,232'Method and system for link jitter compensation including a fast data recovery circuit'20107,653,367'Squelch detector'20107,653,167'Phase deglitch circuit for phase interpolator for high-speed serial I/O applications'20107,482,857'Unified bandgap voltage and PTAT current reference circuit'20097,409,189'Calibration and testing architecture for receivers'20087,324,621'Locked loop circuit'20087,276,940'Buffer/voltage-mirror arrangements for sensitive node voltage connections'20077,271,673'Voltage controlled oscillator (VCO) tuning'20077,183,851'Differential dual port current conveyor circuit'20077,139,544'Direct down-conversion receiver with transconductance-capacitor filter and method'20067,042,932'Synchronization detection architecture for serial data communication'20066,917,660'Adaptive de-skew clock generation'20056,847,236'Buffer/voltage-mirror arrangements for sensitive node voltage connections'20056,838,945'Data resynchronization circuit'20056,775,345'Delay locked loop based data recovery circuit for data communication'20046,639,956'Data resynchronization circuit'20036,633,248'Converting digital signals to analog signals'20036,570,931'Switched voltage adaptive slew rate control and spectrum shaping transmitter for high speed digital transmission'20036,531,896'Dual mode transmitter'20036,469,646'Converting digital signals to analog signals'20026,466,615'Delay locked loop based circuit for data communication'20026,275,555'Digital delay locked loop for adaptive de-skew clock generation'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2020Patents assigned to INTEL CORP (36)· patent assignee history
2001–2009Based in Chandler, AZ, US· patent location history
2010–2020Based in Mesa, AZ, US· patent location history
2012–2018Patents assigned to SONG HONGJIANG (6)· patent assignee history
2012Patents assigned to SONG YAN (1)· patent assignee history
2016Patents assigned to LE DIANBO (1)· patent assignee history
2017Patents assigned to QIAN ZHIGUO (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 36 | 2001–2020 |
| SONG HONGJIANGself | 6 | 2012–2018 |
| LE DIANBO | 1 | 2016 |
| QIAN ZHIGUO | 1 | 2017 |
| SONG YAN | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chandler, AZ, US | 19 | 2001–2009 |
| Mesa, AZ, US | 17 | 2010–2020 |