Inventor
Subhash Deshmukh
Inventor
San Jose, CA, US
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1033%
H01JElectric discharge tubes or discharge lamps28%
C23CCoating metallic material10%
H01LSemiconductor devices8%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
C23FNon-mechanical removal of metallic material from surface5%
H05KPrinted circuits5%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices3%
H10DInorganic electric semiconductor devices3%
PatentTitleYear
9,721,802'LED based optical source coupled with plasma source'20179,576,810'Process for etching metal using a combination of plasma and solid state sources'20179,411,237'Resist hardening and development processes for semiconductor device manufacturing'20169,378,941'Interface treatment of semiconductor surfaces with high density low energy plasma'20168,475,625'Apparatus for etching high aspect ratio features'20138,080,479'Plasma process uniformity across a wafer by controlling a variable frequency coupled to a harmonic resonator'20118,076,247'Plasma process uniformity across a wafer by controlling RF phase between opposing electrodes'20117,968,469'Method of processing a workpiece in a plasma reactor with variable height ground return path to control plasma ion density uniformity'20117,884,025'Plasma process uniformity across a wafer by apportioning ground return path impedances among plural VHF sources'20117,879,731'Improving plasma process uniformity across a wafer by apportioning power among plural VHF sources'20117,846,846'Method of preventing etch profile bending and bowing in high aspect ratio openings by treating a polymer formed on the opening sidewalls'20107,323,116'Methods and apparatus for monitoring a process in a plasma processing system by measuring self-bias voltage'20087,084,070'Treatment for corrosion in substrate processing'20066,271,539'Electrical diagnostic technique for silicon plasma-etch induced damage characterization'20016,265,729'Method for detecting and characterizing plasma-etch induced damage in an integrated circuit'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001Patents assigned to AMERICAN MICRO SYST (2)· patent assignee history
2001Based in Pocatello, ID, US· patent location history
2006–2008Based in Vancouver, WA, US· patent location history
2010–2017Patents assigned to APPLIED MATERIALS INC (11)· patent assignee history
2010–2013Based in San Jose, CA, US· patent location history
2011–2013Patents assigned to DESHMUKH SUBHASH (3)· patent assignee history
2011Patents assigned to BERA KALLOL (2)· patent assignee history
2011Patents assigned to BUCHBERGER JR DOUGLAS A (2)· patent assignee history
2016–2017Based in Livermore, CA, US· patent location history
2016Based in North Andover, MA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| APPLIED MATERIALS INC | 11 | 2010–2017 |
| DESHMUKH SUBHASHself | 3 | 2011–2013 |
| AMERICAN MICRO SYST | 2 | 2001 |
| BERA KALLOL | 2 | 2011 |
| BUCHBERGER JR DOUGLAS A | 2 | 2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 7 | 2010–2013 |
| Livermore, California, US | 3 | 2016–2017 |
| Vancouver, Washington, US | 2 | 2006–2008 |
| Pocatello, ID, US | 2 | 2001 |
| North Andover, Massachusetts, US | 1 | 2016 |