Inventor

Andrew Douglas Davies

Inventor

Rochester, MN, US

Overview

17→

Patents

2000–2019

Patent span

Electricity

Primary field (CPC H)

Patents· 17 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary

H03KPulse technique43%

G06FElectric digital data processing13%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses13%

H10DInorganic electric semiconductor devices13%

H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner9%

H03FAmplifiers4%

H04LTransmission of digital information, e.g. telegraphic communication4%

PatentTitleYear

10,326,450Implementing cascade level shifter for analog voltage2019 10,116,260VCO selection and amplitude management using center tap inductor2018 9,571,069'Implementing clock receiver with low jitter and enhanced duty cycle'2017 9,438,209'Implementing clock receiver with low jitter and enhanced duty cycle'2016 9,059,660'Variable frequency oscillator with specialized inverter stages'2015 7,940,878'Unlock mode in source synchronous receivers'2011 7,202,732'Transimpedance amplifier with linearized transconductance feedback'2007 6,925,549'Asynchronous pipeline control interface using tag values to control passing data through successive pipeline stages'2005 6,808,998'Method for elimination of parasitic bipolar action in silicon on insulator (SOI) dynamic logic circuits'2004 6,502,119'High speed microprocessor zero detection circuit with 32-bit and 64-bit modes'2002 6,462,581'Programmable timing boundary in dynamic circuits'2002 6,407,584'Charge booster for CMOS dynamic circuits'2002 6,365,934'Method and apparatus for elimination of parasitic bipolar action in complementary oxide semiconductor (CMOS) silicon on insulator (SOI) circuits'2002 6,337,584'Method and apparatus for reducing bipolar current effects in silicon-on-insulator (SOI) dynamic logic circuits'2002 6,329,846'Cross-coupled dual rail dynamic logic circuit'2001 6,326,814'Method and apparatus for enhancing noise tolerance in dynamic silicon-on-insulator logic gates'2001 6,094,072'Methods and apparatus for bipolar elimination in silicon-on-insulator (SOI) domino circuits'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2019Patents assigned to IBM (16)· patent assignee history

2000–2019Based in Rochester, MN, US· patent location history

2007Patents assigned to JDS UNIPHASE CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	16	2000–2019
JDS UNIPHASE CORP	1	2007

Locations

Location	Patents	Span
Rochester, Minnesota, US	17	2000–2019