Inventor

Yasuhiro Inokuchi

Inventor
Tokyo, JP

Overview

25→
Patents
1999–2016
Patent span
Electricity
Primary field (CPC H)

Patents· 25 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1033%
C23CCoating metallic material27%
H10DInorganic electric semiconductor devices14%
C30BSingle-crystal growth9%
H01JElectric discharge tubes or discharge lamps9%
H01LSemiconductor devices3%
H10BElectronic memory devices2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
9,373,499'Batch-type remote plasma processing apparatus'20169,039,912'Batch-type remote plasma processing apparatus'20158,790,463'Substrate processing apparatus and semiconductor device producing method'20148,652,258'Substrate treatment device'20148,544,411'Batch-type remote plasma processing apparatus'20138,466,049'Semiconductor device producing method with selective epitaxial growth'20138,071,477'Method of manufacturing semiconductor device and substrate processing apparatus'20118,070,880'Substrate processing apparatus'20118,028,652'Batch-type remote plasma processing apparatus'20118,025,739'Method of manufacturing semiconductor device'20118,020,514'Batch-type remote plasma processing apparatus'20118,012,885'Manufacturing method of semiconductor device'20117,861,668'Batch-type remote plasma processing apparatus'20117,851,379'Substrate processing method and substrate processing apparatus'20106,949,474'Method of manufacturing a semiconductor device and a semiconductor manufacture system'20056,872,636'Method for fabricating a semiconductor device'20056,764,916'Manufacturing method for semiconductor device'20046,503,079'Substrate processing apparatus and method for manufacturing semiconductor device'20036,462,411'Semiconductor wafer processing apparatus for transferring a wafer mount'20026,332,927'Substrate processing apparatus'20016,270,581'Wet-oxidation apparatus and wet-oxidation method'20016,217,663'Substrate processing apparatus and substrate processing method'20016,139,641'Substrate processing apparatus having a gas heating tube'20006,132,553'Substrate processing apparatus'20005,960,159'Heat treatment of semiconductor wafers where upper heater directly heats upper wafer in its entirety and lower heater directly heats lower wafer in its entirety'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2002Patents assigned to KOKUSAI ELECTRIC CO LTD (7)· patent assignee history
1999–2014Based in Tokyo, JP· patent location history
2003–2016Patents assigned to HITACHI INT ELECTRIC INC (18)· patent assignee history
2010–2014Based in Toyama, JP· patent location history
2011–2014Patents assigned to INOKUCHI YASUHIRO (6)· patent assignee history
2011–2014Patents assigned to MORIYA ATSUSHI (3)· patent assignee history
2013–2014Patents assigned to HASHIBA YOSHIAKI (2)· patent assignee history
2015–2016Based in Nakano-ku, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
HITACHI INT ELECTRIC INC182003–2016
KOKUSAI ELECTRIC CO LTD71999–2002
INOKUCHI YASUHIROself62011–2014
MORIYA ATSUSHI32011–2014
HASHIBA YOSHIAKI22013–2014
Locations
LocationPatentsSpan
Tokyo, JP161999–2014
Toyama, JP72010–2014
Nakano-ku, JP22015–2016