Inventor
Richard G. Yamasaki
Inventor
Torrance, CA, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Bprimary
G11BInformation storage based on relative movement between record carrier and transducer34%
H04LTransmission of digital information, e.g. telegraphic communication17%
H03FAmplifiers9%
H03HImpedance networks, e.g. resonant circuits9%
H03KPulse technique9%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses6%
H03MCoding6%
B60JWindows, windscreens, non-fixed roofs, doors, or similar devices for vehicles3%
E06BFixed or movable closures for openings in buildings, vehicles, fences or like enclosures in general, e.g. doors, windows, blinds, gates3%
H03DDemodulation or transference of modulation from one carrier to another3%
PatentTitleYear
10,994,593Mounting structure for doorframe molding20216,563,655'Method and apparatus for failsafing and extending range for write precompensation'20036,553,541'Reduced-complexity sequence detection'20036,043,944'Method and apparatus for failsafing and extending range for write precompensation'20005,995,561'Method and apparatus for reducing noise correlation in a partial response channel'19995,917,859'Method and apparatus for implementing a viterbi detector for PRML channels'19995,914,827'Method and apparatus for implementing a noise generator in an integrated circuit disk drive read channel'19995,644,595'Method and apparatus for an adaptive three tap transversal equalizer for partial-response signaling'19975,517,146'Write precompensation circuit for compensating nonlinear magnetic effects in a recording channel'19965,467,370'Method and apparatus for an adaptive three tap transversal equalizer for partial-response signaling'19955,465,059'Method and apparatus for timing acquisition of partial response class IV signaling'19955,384,560'Maximum likelihood sequence metric calculator'19955,311,178'Method for processing sample values in an RLL channel'19945,182,477'Bipolar tunable transconductance element'19935,162,678'Temperature compensation control circuit for exponential gain function of an AGC amplifier'19925,124,669'One-shot circuit for use in a PLL clock recovery circuit'19925,063,309'High frequency continuous time filter'19914,803,445'Variable frequency oscillator'19894,800,340'Method and apparatus for generating a data recovery window'1989Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1989–2000Patents assigned to SILICON SYSTEMS INC (14)· patent assignee history
1989Patents assigned to SILICON SYSTEM INS (1)· patent assignee history
1989–2003Based in Torrance, CA, US· patent location history
1997–2003Patents assigned to TEXAS INSTRUMENTS INC (3)· patent assignee history
2021Patents assigned to AISIN SEIKI (1)· patent assignee history
2021Patents assigned to TOYOTA MOTOR CO LTD (1)· patent assignee history
2021Based in Toyota, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON SYSTEMS INC | 14 | 1989–2000 |
| TEXAS INSTRUMENTS INC | 3 | 1997–2003 |
| AISIN SEIKI | 1 | 2021 |
| SILICON SYSTEM INS | 1 | 1989 |
| TOYOTA MOTOR CO LTD | 1 | 2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Torrance, California, US | 18 | 1989–2003 |
| Toyota, JP | 1 | 2021 |