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Inventor

Lan D. Phan

Inventor
Laguna Hills, CA, US

Overview

22→
Patents
2012–2021
Patent span
Physics
Primary field (CPC G)

Patents· 22 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing71%
G11CStatic stores23%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%
PatentTitleYear
10,942,656System data storage mechanism providing coherency and segmented data loading202110,379,755System data storage mechanism providing coherency and segmented data loading201910,048,875System and method for managing access requests to a memory storage subsystem20189,875,025System and method for performing data retention in solid-state memory using an LRU list20189,652,379'System and method for reducing contentions in solid-state memory access'20179,477,413'System and method for managing access requests to a memory storage subsystem'20169,405,675'System and method for managing execution of internal commands and host commands in a solid-state memory'20169,305,655'Solving MLC NAND paired page program using reduced spatial redundancy'20169,170,932'System data storage mechanism providing coherency and segmented data loading'20159,164,886'System and method for multistage processing in a memory storage subsystem'20159,135,166'System and method for performing data retention in solid-state memory utilizing copy commands and usage data'20159,110,835'System and method for improving a data redundancy scheme in a solid state subsystem with additional metadata'20159,075,708'System and method for improving data integrity and power-on performance in storage devices'20159,021,192'System and method for enhancing processing of memory access requests'20158,924,629'Mapping table for improving write operation efficiency'20148,793,429'Solid-state drive with reduced power up time'20148,782,327'System and method for managing execution of internal commands and host commands in a solid-state memory'20148,769,190'System and method for reducing contentions in solid-state memory access'20148,713,066'Managing wear leveling and garbage collection operations in a solid-state memory using linked lists'20148,700,951'System and method for improving a data redundancy scheme in a solid state subsystem with additional metadata'20148,612,669'System and method for performing data retention in solid-state memory using copy commands and validity and usage data'20138,316,176'Non-volatile semiconductor memory segregating sequential data during garbage collection to reduce write amplification'2012

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2012–2021Patents assigned to WESTERN DIGITAL TECH INC (21)· patent assignee history
2012–2015Patents assigned to PHAN LAN D (12)· patent assignee history
2012–2021Based in Laguna Hills, CA, US· patent location history
2013–2015Patents assigned to KANG HO-FAN (6)· patent assignee history
2013–2014Patents assigned to CALL MATTHEW (5)· patent assignee history
2013–2014Patents assigned to SYU MEI-MAN L (4)· patent assignee history
2014–2015Based in Garden Grove, CA, US· patent location history
2016–2018Based in Trabuco Canyon, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
WESTERN DIGITAL TECH INC212012–2021
PHAN LAN Dself122012–2015
KANG HO-FAN62013–2015
CALL MATTHEW52013–2014
SYU MEI-MAN L42013–2014
Locations
LocationPatentsSpan
Laguna Hills, California, US132012–2021
Garden Grove, California, US62014–2015
Trabuco Canyon, California, US32016–2018