Inventor
Eric T. West
Inventor
San Jose, CA, US
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication42%
G06FElectric digital data processing26%
G01RMeasuring electric variables11%
H03KPulse technique11%
G11CStatic stores5%
H10DInorganic electric semiconductor devices5%
PatentTitleYear
8,176,458'Increased effective flip-flop density in a structured ASIC'20128,122,413'Transparent test method and scan flip-flop'20127,461,365'Increased effective flip-flop density in a structured ASIC'20086,885,043'ASIC routing architecture'20056,861,867'Method and apparatus for built-in self-test of logic circuits with multiple clock domains'20056,724,725'Automatic LAN flow control mechanisms'20046,696,856'Function block architecture with variable drive strengths'20046,680,626'High speed differential receiver'20046,185,190'Method and apparatus for using synthetic preamble signals to awaken repeater'20016,173,380'Apparatus and method for providing multiple channel clock-data alignment'20016,098,103'Automatic MAC control frame generating apparatus for LAN flow control'20005,920,897'Apparatus and method for providing multiple channel clock-data alignment'19995,898,678'Method and apparatus for using synthetic preamable signals to awaken repeater'19995,768,301'Apparatus and method for detecting and correcting pair swap, and implementing a link integrity function in a packet-based data communications system'19985,727,006'Apparatus and method for detecting and correcting reverse polarity, in a packet-based data communications system'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–1999Patents assigned to SEEQ TECHNOLOGY INC (4)· patent assignee history
1998–2012Based in San Jose, CA, US· patent location history
2000–2004Patents assigned to LSI LOGIC CORP (3)· patent assignee history
2004–2005Patents assigned to LIGHTSPEED SEMICONDUCTOR CORP (4)· patent assignee history
2012Patents assigned to OTRSOTECH LTD LIABILITY COMPANY (2)· patent assignee history
2012Patents assigned to EPLETT STEVEN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LIGHTSPEED SEMICONDUCTOR CORP | 4 | 2004–2005 |
| SEEQ TECHNOLOGY INC | 4 | 1998–1999 |
| LSI LOGIC CORP | 3 | 2000–2004 |
| OTRSOTECH LTD LIABILITY COMPANY | 2 | 2012 |
| EPLETT STEVEN | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 15 | 1998–2012 |