Inventor
Sheng-Chen Wang
Inventor
Hsinchu, TW
Overview
Patents· 48 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices29%
H10DInorganic electric semiconductor devices27%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
B24BMachines, devices, or processes for grinding or polishing6%
H10BElectronic memory devices3%
G06FElectric digital data processing2%
B24CAbrasive or related blasting with particulate material1%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form1%
G01BMeasuring length, thickness or similar linear dimensions1%
PatentTitleYear
10,879,374Semiconductor device and manufacturing method thereof202010,868,006FinFET transistor with fin back biasing202010,864,612Polishing pad and method of using202010,868,151Conformal transfer doping method for fin-like field effect transistor202010,811,262Semiconductor device having a uniform and thin silicide layer on an epitaxial source/ drain structure and manufacturing method thereof202010,686,075Self-aligned gate hard mask and method forming same202010,680,084Epitaxial structures for fin-like field effect transistors202010,675,732Apparatus and method for CMP pad conditioning202010,535,569Forming transistor by selectively growing gate spacer202010,529,803Semiconductor device with epitaxial source/drain202010,529,725Flexible merge scheme for source/drain epitaxy regions202010,522,540FinFET transistor with fin back biasing201910,516,033Semiconductor device and manufacturing method thereof201910,483,266Flexible merge scheme for source/drain epitaxy regions201910,468,270Performing planarization process controls in semiconductor fabrication201910,431,584Semiconductor device including fin structures and manufacturing method thereof201910,328,549Polishing head, chemical-mechanical polishing system and method for polishing substrate201910,276,691Conformal transfer doping method for fin-like field effect transistor201910,272,661Pad removal device and method201910,163,902FinFET transistor with fin back biasing201810,163,728Semiconductor device having a stacked fin structure and manufacturing method thereof201810,103,146FinFET device with epitaxial structures that wrap around the fins and the method of fabricating the same201810,062,784Self-aligned gate hard mask and method forming same201810,062,688Semiconductor device with epitaxial source/drain201810,037,923Forming transistor by selectively growing gate spacer20189,997,631Methods for reducing contact resistance in semiconductors manufacturing process20189,954,076Semiconductor device and manufacturing method thereof20189,953,836Barrier layer above anti-punch through (APT) implant region to improve mobility of channel region of fin field effect transistor (FinFET) device structure20189,934,961Methods for forming fin structures for semiconductor devices20189,917,086'FinFET transistor with fin back biasing'20189,871,038'Semiconductor device including fin structures and manufacturing method thereof'20189,865,595'FinFET device with epitaxial structures that wrap around the fins and the method of fabricating the same'20189,779,106'Application management method and device'20179,768,080'Semiconductor manufacturing apparatus and method thereof'20179,659,930'Semiconductor device and manufacturing method thereof'20179,601,377'FinFET formation process and structure'20179,502,542'FinFET transistor with fin back biasing'20169,484,244'Structures and methods for forming fin structures'20169,481,069'Chemical mechanical polishing apparatus and polishing method using the same'20169,472,620'Semiconductor device including fin structures and manufacturing method thereof'20169,450,046'Semiconductor structure with fin structure and wire structure and method for forming the same'20169,449,882'Semiconductor device and manufacturing method thereof'20169,425,317'Fin field effect transistor (FinFET) device structure with Ge-doped inter-layer dielectric (ILD) structure'20169,418,904'Localized CMP to improve wafer planarization'20168,992,287'Slurry supply system for CMP process'20157,608,926'Nonvolatile semiconductor memory device'20097,012,021'Method for end point detection polysilicon chemical mechanical polishing in an anti-fuse memory device'20066,951,817'Method of forming an insulator between features of a semiconductor device'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2009Patents assigned to TAIWAN SEMICONDUCTOR MFG (3)· patent assignee history
2005–2020Based in Taichung, TW· patent location history
2006–2020Based in Hsinchu, TW· patent location history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (44)· patent assignee history
2015–2016Patents assigned to WANG SHENG-CHEN (2)· patent assignee history
2015–2016Patents assigned to WU FENG-INN (2)· patent assignee history
2017Patents assigned to BEIJING LENOVO SOFTWARE LTD (1)· patent assignee history
2017Based in Beijing, CN· patent location history
2019–2020Based in Hsinchu County, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 44 | 2015–2020 |
| TAIWAN SEMICONDUCTOR MFG | 3 | 2005–2009 |
| WANG SHENG-CHENself | 2 | 2015–2016 |
| WU FENG-INN | 2 | 2015–2016 |
| BEIJING LENOVO SOFTWARE LTD | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 34 | 2006–2020 |
| Taichung, TW | 11 | 2005–2020 |
| Hsinchu County, TW | 2 | 2019–2020 |
| Beijing, CN | 1 | 2017 |