Inventor
Han-Shiao Chen
Inventor
Taichung, TW
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%
H05KPrinted circuits23%
H01LSemiconductor devices17%
Y02PClimate change mitigation technologies in the production or processing of goods14%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
H04LTransmission of digital information, e.g. telegraphic communication3%
PatentTitleYear
11,070,433Network function NF management method and NF management device202110,249,587Semiconductor device including optional pad interconnect201910,051,733Printed circuit board with coextensive electrical connectors and contact pad areas20189,230,919'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'20169,209,159'Hidden plating traces'20159,006,912'Printed circuit board with coextensive electrical connectors and contact pad areas'20158,878,368'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'20148,487,441'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'20138,461,675'Substrate panel with plating bar structured to allow minimum kerf width'20138,217,522'Printed circuit board with coextensive electrical connectors and contact pad areas'20128,129,272'Hidden plating traces'20127,967,184'Padless substrate for surface mounted components'20117,806,731'Rounded contact fingers on substrate/PCB for crack prevention'20107,746,661'Printed circuit board with coextensive electrical connectors and contact pad areas'20107,592,699'Hidden plating traces'20097,538,438'Substrate warpage control and continuous electrical enhancement'20097,355,283'Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2011Patents assigned to SANDISK CORP (6)· patent assignee history
2008–2019Based in Taichung, TW· patent location history
2010Based in Jhudong Township, TW· patent location history
2012–2018Patents assigned to SANDISK TECHNOLOGIES INC (9)· patent assignee history
2012–2015Patents assigned to CHEN HAN-SHIAO (6)· patent assignee history
2012–2015Patents assigned to LIAO CHIH-CHIN (6)· patent assignee history
2012–2015Patents assigned to TAKIAR HEM (6)· patent assignee history
2021Based in Shanghai, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SANDISK TECHNOLOGIES INC | 9 | 2012–2018 |
| CHEN HAN-SHIAOself | 6 | 2012–2015 |
| LIAO CHIH-CHIN | 6 | 2012–2015 |
| SANDISK CORP | 6 | 2008–2011 |
| TAKIAR HEM | 6 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Taichung, TW | 15 | 2008–2019 |
| Shanghai, CN | 1 | 2021 |
| Jhudong Township, TW | 1 | 2010 |