Inventor
Naftali E. Lustig
Inventor
Croton-on-Hudson, NY, US
Overview
Patents· 66 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1030%
H01LSemiconductor devices23%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
H10DInorganic electric semiconductor devices5%
G01RMeasuring electric variables3%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
H01HElectric switches3%
B24BMachines, devices, or processes for grinding or polishing2%
Y10TTechnical subjects covered by former us classification2%
C09GPolishing compositions2%
PatentTitleYear
11,133,268Crack bifurcation in back-end-of-line202111,011,415Airgap vias in electrical interconnects202110,998,263Back end of line (BEOL) time dependent dielectric breakdown (TDDB) mitigation within a vertical interconnect access (VIA) level of an integrated circuit (IC) device202110,796,949Airgap vias in electrical interconnects202010,256,186Interconnect structure having subtractive etch feature and damascene feature201910,229,875Stacked via structure for metal fuse applications201910,224,236Forming air gap201910,177,031Subtractive etch interconnects201910,103,068Detecting a void between a via and a wiring line20189,893,011'Back-end electrically programmable fuse'20189,859,208'Bottom self-aligned via'20189,852,980Interconnect structure having substractive etch feature and damascene feature20179,685,404'Back-end electrically programmable fuse'20179,601,426'Interconnect structure having subtractive etch feature and damascene feature'20179,536,842'Structure with air gap crack stop'20179,536,830'High performance refractory metal / copper interconnects to eliminate electromigration'20179,524,916'Structures and methods for determining TDDB reliability at reduced spacings using the structures'20169,502,350'Interconnect scaling method including forming dielectric layer over subtractively etched first conductive layer and forming second conductive material on dielectric layer'20169,455,186'Selective local metal cap layer formation for improved electromigration behavior'20169,431,346'Graphene-metal E-fuse'20169,431,292'Alternate dual damascene method for forming interconnects'20169,425,144'Metal fuse structure for improved programming capability'20169,406,560'Selective local metal cap layer formation for improved electromigration behavior'20169,385,038'Selective local metal cap layer formation for improved electromigration behavior'20169,360,525'Stacked via structure for metal fuse applications'20169,324,655'Modified via bottom for beol via efuse'20169,293,412'Graphene and metal interconnects with reduced contact resistance'20169,257,391'Hybrid graphene-metal interconnect structures'20169,202,743'Graphene and metal interconnects'20159,171,801'E-fuse with hybrid metallization'20159,142,506'E-fuse structures and methods of manufacture'20159,105,637'Anti-fuse structure and fabrication'20159,105,638'Via-fuse with low dielectric constant'20159,099,468'Electronic fuse vias in interconnect structures'20159,093,164'Redundant via structure for metal fuse applications'20159,093,452'Electronic fuse with resistive heater'20159,076,847'Selective local metal cap layer formation for improved electromigration behavior'20159,059,170'Electronic fuse having a damaged region'20159,059,169'E-fuse structures and methods of manufacture'20159,034,664'Method to resolve hollow metal defects in interconnects'20158,962,467'Metal fuse structure for improved programming capability'20158,921,167'Modified via bottom for BEOL via efuse'20148,916,461'Electronic fuse vias in interconnect structures'20148,836,124'Fuse and integrated conductor'20148,742,766'Stacked via structure for metal fuse applications'20148,736,020'Electronic anti-fuse'20148,633,707'Stacked via structure for metal fuse applications'20148,384,219'Semiconductor having interconnects with improved mechanical properties by insertion of nanoparticles'20138,232,646'Interconnect structure for integrated circuits having enhanced electromigration resistance'20128,129,269'Method of improving mechanical properties of semiconductor interconnects with nanoparticles'20128,030,707'Semiconductor structure'20117,488,679'Interconnect structure and process of making the same'20096,933,191'Two-mask process for metal-insulator-metal capacitors and single mask process for thin film resistors'20056,743,268'Chemical-mechanical planarization of barriers or liners for copper metallurgy'20046,632,377'Chemical-mechanical planarization of metallurgy'20036,573,606'Chip to wiring interface with single metal alloy layer applied to surface of copper interconnect'20036,375,693'Chemical-mechanical planarization of barriers or liners for copper metallurgy'20026,153,043'Elimination of photo-induced electrochemical dissolution in chemical mechanical polishing'20006,020,264'Method and apparatus for in-line oxide thickness determination in chemical-mechanical polishing'20005,633,195'Laser planarization of zone 1 deposited metal films for submicron metal interconnects'19975,569,501'Diamond-like carbon films from a hydrocarbon helium plasma'19965,470,661'Diamond-like carbon films from a hydrocarbon helium plasma'19955,433,651'In-situ endpoint detection and process monitoring method and apparatus for chemical-mechanical polishing'19955,358,899'Oxygen assisted ohmic contact formation to n-type gallium arsenide'19945,337,015'In-situ endpoint detection method and apparatus for chemical-mechanical polishing using low amplitude input voltage'19945,317,190'Oxygen assisted ohmic contact formation to N-type gallium arsenide'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2021Patents assigned to IBM (59)· patent assignee history
1994–2021Based in Croton-on-Hudson, NY, US· patent location history
2012–2017Patents assigned to BONILLA GRISELDA (9)· patent assignee history
2012–2015Patents assigned to FILIPPI RONALD G (9)· patent assignee history
2012–2017Patents assigned to SIMON ANDREW H (9)· patent assignee history
2012Based in Hopewell Junction, NY, US· patent location history
2016–2019Patents assigned to GLOBALFOUNDRIES INC (9)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 59 | 1994–2021 |
| BONILLA GRISELDA | 9 | 2012–2017 |
| FILIPPI RONALD G | 9 | 2012–2015 |
| GLOBALFOUNDRIES INC | 9 | 2016–2019 |
| SIMON ANDREW H | 9 | 2012–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Croton-on-Hudson, New York, US | 64 | 1994–2021 |
| Hopewell Junction, New York, US | 1 | 2012 |