Inventor
Bert Sullam
Inventor
Bellevue, WA, US
Overview
Patents· 44 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing38%
H03KPulse technique28%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use9%
G01RMeasuring electric variables8%
H03MCoding5%
H04LTransmission of digital information, e.g. telegraphic communication4%
G05BControl or regulating systems in general3%
G09BEducational or demonstration appliances3%
H04NPictorial communication, e.g. television1%
PatentTitleYear
11,105,851Combined analog architecture and functionality in a mixed-signal array202110,826,499System level interconnect with programmable switching202010,634,722Combined analog architecture and functionality in a mixed-signal array202010,516,397System level interconnect with programmable switching201910,345,377Combined analog architecture and functionality in a mixed-signal array201910,097,185System level interconnect with programmable switching20189,952,282Combined analog architecture and functionality in a mixed-signal array20189,880,536'Autonomous control in a programmable system'20189,612,987'Dynamically reconfigurable analog routing circuits and methods for system on a chip'20179,564,902'Dynamically configurable and re-configurable data path'20179,553,588'System level interconnect with programmable switching'20179,448,964'Autonomous control in a programmable system'20169,325,320'System level interconnect with programmable switching'20169,143,134'Combined analog architecture and functionality in a mixed-signal array'20159,124,285'On-chip calibration method'20159,018,979'Universal digital block interconnection and channel routing'20158,838,852'Programmable interrupt routing system'20148,686,985'Active liquid crystal display drivers and duty cycle operation'20148,643,519'On-chip calibration method'20148,639,850'Addressing scheme to allow flexible mapping of functions in a programmable logic array'20148,601,254'Configurable reset pin for input/output port'20138,598,908'Built in system bus interface for random access to programmable logic registers'20138,516,025'Clock driven dynamic datapath chaining'20138,487,655'Combined analog architecture and functionality in a mixed-signal array'20138,482,313'Universal digital block interconnection and channel routing'20138,476,928'System level interconnect with programmable switching'20138,402,313'Reconfigurable testing system and method'20138,250,249'Processor independent line driving and receiving system'20128,135,884'Programmable interrupt routing system'20128,125,360'On-chip calibration method'20128,112,551'Addressing scheme to allow flexible mapping of functions in a programmable logic array'20128,026,739'System level interconnect with programmable switching'20117,737,724'Universal digital block interconnection and channel routing'20107,555,664'Independent control of core system blocks for power optimization'20097,479,913'Configurable analog to digital converter'20097,308,608'Reconfigurable testing system and method'20077,076,420'Emulator chip/board architecture and interface'20067,023,257'Architecture for synchronizing and resetting clock signals supplied to multiple programmable analog blocks'20066,967,511'Method for synchronizing and resetting clock signals supplied to multiple programmable analog blocks'20056,950,954'Method and circuit for synchronizing a write operation between an on-chip microprocessor and an on-chip programmable analog device operating at different frequencies'20056,859,884'Method and circuit for allowing a microprocessor to change its operating frequency on-the-fly'20056,614,320'System and method of providing a programmable clock architecture for an advanced microcontroller'20035,882,202'Method and system for aiding foreign language instruction'19995,697,789'Method and system for aiding foreign language instruction'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–1999Based in Kent, WA, US· patent location history
2003–2021Patents assigned to CYPRESS SEMICONDUCTOR CORP (42)· patent assignee history
2003–2021Based in Bellevue, WA, US· patent location history
2012–2017Patents assigned to SULLAM BERT (18)· patent assignee history
2012–2017Patents assigned to KUTZ HAROLD (7)· patent assignee history
2013–2017Patents assigned to SNYDER WARREN (6)· patent assignee history
2013–2017Patents assigned to WILLIAMS TIMOTHY (5)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| CYPRESS SEMICONDUCTOR CORP | 42 | 2003–2021 |
| SULLAM BERTself | 18 | 2012–2017 |
| KUTZ HAROLD | 7 | 2012–2017 |
| SNYDER WARREN | 6 | 2013–2017 |
| WILLIAMS TIMOTHY | 5 | 2013–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Bellevue, Washington, US | 42 | 2003–2021 |
| Kent, Washington, US | 2 | 1997–1999 |