Inventor

KUO-JU CHEN

Inventor
TW

Overview

38→
Patents
2021–2026
Patent span
Electricity
Primary field (CPC H)

Patents· 38 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices26%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10DInorganic electric semiconductor devices24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
B82YSpecific uses or applications of nanostructures1%
H01JElectric discharge tubes or discharge lamps1%
PatentTitleYear
12,557,623Semiconductor device with connecting structure having a doped layer and method for forming the same202612,538,544Method for manufacturing semiconductor device202612,484,240Semiconductor device and methods of forming the same202512,432,963Device having an air gap adjacent to a contact plug and covered by a doped dielectric layer202512,419,099Method for manufacturing semiconductor device202512,368,098Methods of forming semiconductor device202512,300,740Metal layer protection during wet etching202512,278,141Semiconductor devices and methods of manufacture202512,243,940Methods of forming air spacers in semiconductor devices202512,224,327Semiconductor device and method202512,183,632Bottom lateral expansion of contact plugs through implantation202412,112,977Reducing spacing between conductive features through implantation202412,068,195Metal loss prevention using implantation202412,015,055Doping for semiconductor device with conductive feature202412,009,305Semiconductor device and method for forming the same202411,984,491Metal layer protection during wet etching202411,973,027Semiconductor device and methods of forming the same202411,955,553Source/drain structure202411,908,740Semiconductor structure with doped via plug202411,901,455Method of manufacturing a FinFET by implanting a dielectric with a dopant202411,862,694Semiconductor device and method202411,854,870Etch method for interconnect structure202311,791,204Semiconductor device with connecting structure having a doped layer and method for forming the same202311,742,386Doping for semiconductor device with conductive feature202311,710,659Metal loss prevention using implantation202311,682,729Methods of forming air spacers in semiconductor devices202311,652,053Semiconductor device and method for forming the same202311,615,982Reducing spacing between conductive features through implantation202311,594,636Source/drain structure202311,515,206Semiconductor structure with doped via plug202211,502,000Bottom lateral expansion of contact plugs through implantation202211,456,383Semiconductor device having a contact plug with an air gap spacer202211,450,741Doping for semiconductor device with conductive feature202211,289,417Semiconductor device and methods of forming the same202211,257,952Source/drain structure202211,227,950Methods of forming air spacers in semiconductor devices202211,211,289Metal loss prevention using implantation202111,145,751Semiconductor structure with doped contact plug and method for forming the same2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (38)· patent assignee history
2021–2026Based in TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD382021–2026
Locations
LocationPatentsSpan
TW382021–2026