Inventor

Chen-Lin Yang

Inventor
Zhubei City, TW

Overview

29→
Patents
2008–2020
Patent span
Physics
Primary field (CPC G)

Patents· 29 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores52%
G06FElectric digital data processing15%
H03KPulse technique11%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses4%
G08BSignalling systems, e.g. personal calling systems2%
H02JElectric power networks2%
H04BTransmission2%
H04JMultiplex communication2%
H04MTelephonic communication2%
H04WWireless communication networks2%
PatentTitleYear
10,685,686Power switch control for dual power supply202010,574,213Clock circuit and method of operating the same202010,510,380Power switch control for dual power supply201910,503,421Configurable memory storage system201910,340,897Clock generating circuit and method of operating the same201910,304,500Power switch control for dual power supply201910,276,232Read margin tracking in memory applications20199,978,443Method of controlling auxiliary branches for SRAM cell20189,685,224'Memory with bit line control'20179,659,603'Power management circuit for an electronic device'20179,390,816'Integrated circuit having voltage mismatch reduction'20169,389,786'Memory device with tracking mechanism'20169,263,122'Data-controlled auxiliary branches for SRAM cell'20169,240,233'Integrated circuit having voltage mismatch reduction'20169,239,902'Method of preparing a layout and system for performing the same'20169,111,595'Memory device with tracking wordline voltage level circuit and method'20159,093,126'Memory circuit'20159,007,859'Far end resistance tracking design with near end pre-charge control for faster recovery time'20158,990,751'Computer system and method of preparing a layout'20158,988,949'Header circuit for controlling supply voltage of a cell'20158,830,784'Negative word line driver for semiconductor memories'20148,767,494'Far end resistance tracking design with near end pre-charge control for faster recovery time'20148,441,885'Methods and apparatus for memory word line driver'20138,437,733'Mobile terminal for implementing monitoring management and monitoring implementation method thereof'20138,391,097'Memory word-line driver having reduced power consumption'20138,296,705'Code tiling scheme for deep-submicron ROM compilers'20128,213,241'Memory readout scheme using separate sense amplifier voltage'20128,077,517'Distributed VDC for SRAM memory'20117,467,365'Sanity checker for integrated circuits'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (16)· patent assignee history
2008–2015Based in Hsinchu, TW· patent location history
2011–2015Patents assigned to YANG CHEN-LIN (9)· patent assignee history
2011–2013Patents assigned to CHOU SHAO-YU (3)· patent assignee history
2013–2015Patents assigned to CHAN WEI MIN (4)· patent assignee history
2013–2020Based in Zhubei City, TW· patent location history
2013Based in Shenzhen, CN· patent location history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (12)· patent assignee history
2016–2020Based in Hsinchu County, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG162008–2016
TAIWAN SEMICONDUCTOR MFG CO LTD122015–2020
YANG CHEN-LINself92011–2015
CHAN WEI MIN42013–2015
CHOU SHAO-YU32011–2013
Locations
LocationPatentsSpan
Zhubei City, TW152013–2020
Hsinchu County, TW82016–2020
Hsinchu, TW52008–2015
Shenzhen, CN12013