Inventor

Stefan Hau-Riege

Inventor
Fremont, CA, US

Overview

16→
Patents
2003–2011
Patent span
Electricity
Primary field (CPC H)

Patents· 16 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1038%
G01NInvestigating or analysing materials by determining their chemical or physical properties13%
G01RMeasuring electric variables13%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
B82YSpecific uses or applications of nanostructures4%
F24VCollection, production or use of heat not otherwise provided for4%
G01JMeasurement of intensity, velocity, spectral content, polarisation, phase or pulse characteristics of infrared, visible or ultraviolet light4%
G02BOptical elements, systems or apparatus4%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
G21KHandling of particles or ionising radiation not otherwise provided for4%
PatentTitleYear
7,867,441'Low to moderate temperature nanolaminate heater'20117,672,430'Area X-ray or UV camera system for high-intensity beams'20107,300,871'Method of doping a conductive layer near a via'20077,236,565'Tamper to delay motion and decrease ionization of a sample during short pulse x-ray imaging'20077,212,282'Method for characterizing mask defects using image reconstruction from X-ray diffraction patterns'20077,153,774'Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability'20067,087,516'Electromigration-reliability improvement of dual damascene interconnects'20066,925,216'Direct-patterned optical waveguides on amorphous silicon films'20056,870,262'Wafer-bonding using solder and method of making the same'20056,833,321'Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability'20046,822,473'Determination of permeability of layer material within interconnect'20046,768,323'System and method for determining location of extrusion in interconnect'20046,762,597'Structure, system, and method for assessing electromigration permeability of layer material within interconnect'20046,717,268'Electromigration-reliability improvement of dual damascene interconnects'20046,667,225'Wafer-bonding using solder and method of making the same'20036,579,795'Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2007Patents assigned to INTEL CORP (8)· patent assignee history
2003–2007Based in Milpitas, CA, US· patent location history
2004Patents assigned to ADVANCED MICRO DEVICES INC (3)· patent assignee history
2004–2011Based in Fremont, CA, US· patent location history
2005–2007Patents assigned to UNIV CALIFORNIA (3)· patent assignee history
2010–2011Patents assigned to L LIVERMORE NAT SECURITY LLC (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP82003–2007
ADVANCED MICRO DEVICES INC32004
UNIV CALIFORNIA32005–2007
L LIVERMORE NAT SECURITY LLC22010–2011
Locations
LocationPatentsSpan
Fremont, California, US82004–2011
Milpitas, California, US82003–2007