Inventor
Giuseppe D'Eliseo
Inventor
Caserta, IT
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing64%
G11CStatic stores18%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use18%
PatentTitleYear
11,132,044Dynamic P2L asynchronous power loss mitigation202111,023,167Methods and apparatuses for executing a plurality of queued tasks in a memory202110,983,918Hybrid logical to physical caching scheme202110,725,904Synchronizing NAND logical-to-physical table region tracking202010,552,316Controlling NAND operation latency202010,108,372Methods and apparatuses for executing a plurality of queued tasks in a memory20189,183,135'Preparation of memory device for access using memory access type indicator signal'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2021Patents assigned to MICRON TECHNOLOGY INC (7)· patent assignee history
2015Patents assigned to CARACCIO DANILO (1)· patent assignee history
2015Patents assigned to CONFALONIERI EMANUELE (1)· patent assignee history
2015Patents assigned to D ELISEO GIUSEPPE (1)· patent assignee history
2015Patents assigned to FALANGA FRANCESCO (1)· patent assignee history
2015–2021Based in Caserta, IT· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 7 | 2015–2021 |
| CARACCIO DANILO | 1 | 2015 |
| CONFALONIERI EMANUELE | 1 | 2015 |
| D ELISEO GIUSEPPEself | 1 | 2015 |
| FALANGA FRANCESCO | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Caserta, IT | 7 | 2015–2021 |