Inventor

Jan Gray

Inventor

Bellevue, WA, US

Overview

1994–2021

Patent span

Physics

Primary field (CPC G)

Patents· 61 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing82%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%

H04LTransmission of digital information, e.g. telegraphic communication4%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%

A61HPhysical therapy apparatus, e.g. devices for locating or stimulating reflex points in the body1%

A61NElectrotherapy1%

G06NComputing arrangements based on specific computational models1%

PatentTitleYear

11,106,467Incremental scheduler for out-of-order block ISA processors2021 11,048,517Decoupled processor instruction window and operand buffer2021 10,587,534Composing cores and FPGAS at massive scale with directional, two dimensional routers and interconnection networks2020 10,419,338Connecting diverse client cores using a directional two-dimensional router and network2019 10,409,606Verifying branch targets2019 10,409,599Decoding information about a group of instructions including a size of the group of instructions2019 10,346,168Decoupled processor instruction window and operand buffer2019 10,332,008Parallel decision tree processor architecture2019 10,175,988Explicit instruction scheduler state information for a processor2019 10,116,557Directional two-dimensional router and interconnection network for field programmable gate arrays, and other circuits and applications of the router and network2018 9,952,867Mapping instruction blocks based on block size2018 9,946,548Age-based management of instruction blocks in a processor instruction window2018 9,767,027'Private memory regions and coherency optimization by controlling snoop traffic volume in multi-level cache hierarchy'2017 9,720,693'Bulk allocation of instruction blocks to a processor instruction window'2017 9,658,880'Efficient garbage collection and exception handling in a hardware accelerated transactional memory system'2017 9,477,515'Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode'2016 9,280,397'Using buffered stores or monitoring to filter redundant transactional accesses and mechanisms for mapping data to buffered metadata'2016 9,195,600'Mechanisms to accelerate transactions using buffered stores'2015 9,092,253'Instrumentation of hardware assisted transactional memory system'2015 9,069,670'Mechanisms to accelerate transactions using buffered stores'2015 9,027,000'Automated method and system for collecting and reporting API performance profiles'2015 8,898,652'Cache metadata for accelerating software transactional memory'2014 8,886,894'Mechanisms to accelerate transactions using buffered stores'2014 8,856,466'Mechanisms to accelerate transactions using buffered stores'2014 8,813,052'Cache metadata for implementing bounded transactional memory'2014 8,812,796'Private memory regions and coherence optimizations'2014 8,719,514'Software filtering in a transactional memory system'2014 8,688,951'Operating system virtual memory management for hardware transactional memory'2014 8,533,440'Accelerating parallel transactions using cache resident transactions'2013 8,521,995'Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode'2013 8,489,864'Performing escape actions in transactions'2013 8,473,921'Debugging mechanisms in a cache-based memory isolation system'2013 8,402,447'Parallelizing sequential frameworks using transactions'2013 8,402,218'Efficient garbage collection and exception handling in a hardware accelerated transactional memory system'2013 8,370,577'Metaphysically addressed cache metadata'2013 8,365,016'Performing mode switching in an unbounded transactional memory (UTM) system'2013 8,356,166'Minimizing code duplication in an unbounded transactional memory system by using mode agnostic transactional read and write barriers'2013 8,316,194'Mechanisms to accelerate transactions using buffered stores'2012 8,250,331'Operating system virtual memory management for hardware transactional memory'2012 8,229,907'Hardware accelerated transactional memory system with open nested transactions'2012 8,225,297'Cache metadata identifiers for isolation and sharing'2012 8,161,247'Wait loss synchronization'2012 8,095,824'Performing mode switching in an unbounded transactional memory (UTM) system'2012 8,024,714'Parallelizing sequential frameworks using transactions'2011 8,010,550'Parallelizing sequential frameworks using transactions'2011 8,001,538'Software accessible cache metadata'2011 7,895,579'Automated method and system for collecting and reporting API performance profiles'2011 7,437,711'Communication among agile and context-bound objects'2008 7,409,675'Code rewriting'2008 7,389,514'Software component execution management using context objects for tracking externally-defined intrinsic properties of executing software components within an execution environment'2008 7,380,038'Priority registers for biasing access to shared resources'2008 7,222,217'Cache residency test instruction'2007 7,076,784'Software component execution management using context objects for tracking externally-defined intrinsic properties of executing software components within an execution environment'2006 6,631,425'Just-in-time activation and as-soon-as-possible deactivation or server application components'2003 6,473,791'Object load balancing'2002 6,442,620'Environment extensibility and automatic services for component applications using contexts, policies and activators'2002 5,854,932'Compiler and method for avoiding unnecessary recompilation'1998 5,617,569'Method and system for implementing pointers to members in a compiler for an object-oriented programming language'1997 5,603,030'Method and system for destruction of objects using multiple destructor functions in an object-oriented computer system'1997 5,432,936'Method for implementing pointers to members in a compiler for an object-oriented programming language'1995 5,371,891'Method for object construction in a compiler for an object-oriented programming language'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994–2014Patents assigned to MICROSOFT CORP (33)· patent assignee history

1994–2015Based in Redmond, WA, US· patent location history

2007–2021Based in Bellevue, WA, US· patent location history

2012–2016Patents assigned to GRAY JAN (22)· patent assignee history

2012–2016Patents assigned to ADL-TABATABAI ALI-REZA (17)· patent assignee history

2012–2016Patents assigned to SHEAFFER GAD (17)· patent assignee history

2014–2015Based in Belluvue, WA, US· patent location history

2015–2021Patents assigned to MICROSOFT TECHNOLOGY LICENSING LLC (14)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MICROSOFT CORP	33	1994–2014
GRAY JANself	22	2012–2016
ADL-TABATABAI ALI-REZA	17	2012–2016
SHEAFFER GAD	17	2012–2016
MICROSOFT TECHNOLOGY LICENSING LLC	14	2015–2021

Locations

Location	Patents	Span
Bellevue, Washington, US	46	2007–2021
Redmond, Washington, US	12	1994–2015
Belluvue, Washington, US	3	2014–2015