Inventor
Jongmin Park
Inventor
Cupertino, CA, US
Overview
Patents· 57 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores24%
G09GArrangements or circuits for control of indicating devices using static means to present variable information10%
H01MProcesses or means, e.g. batteries, for the direct conversion of chemical energy into electrical energy7%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution7%
G06FElectric digital data processing6%
G01RMeasuring electric variables5%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
G09FDisplaying3%
H02JElectric power networks3%
H03KPulse technique3%
PatentTitleYear
10,809,303Device and method for estimating state of battery202010,733,936Organic light-emitting display device and method of driving the same202010,671,207Multi-tile display system and driving method of unrelated display devices using a user input pattern202010,375,840Transparent display device201910,365,307Apparatus and method for sensing opening of current interrupt device of battery unit201910,366,021Memory system including DRAM cache and cache management method thereof201910,347,173Organic light emitting diode display and method for driving the same201910,297,178Transparent display device201910,276,099Organic light emitting diode display and method for driving the same201910,134,357System and method for device pairing, and mobile terminal201810,102,802Organic light-emitting display device and method for driving the same201810,008,276High accuracy leakage detection through low voltage biasing20189,953,565Organic light emitting diode display and method for driving the same20189,934,830Multi-communication device in a memory system20189,715,913'Temperature code circuit with single ramp for calibration and determination'20179,698,676'Charge pump based over-sampling with uniform step size for current detection'20179,641,013'Method of balancing rack voltages of battery pack including racks'20179,640,116'Hybrid driving manner organic light emitting diode display apparatus'20179,558,836'Compact high speed sense amplifier for non-volatile memory with reduced layout area and power consumption'20179,553,506'Charge pump strength calibration and screening in circuit design'20179,514,831'Multi-clock generation through phase locked loop (PLL) reference'20169,468,641'Anti-inflammatory pharmaceutical composition comprising benzopyranyl tetracycles'20169,418,750'Single ended word line and bit line time constant measurement'20169,412,304'Display device and method for driving the same'20169,368,224'Self-adjusting regulation current for memory array source line'20169,330,776'High voltage step down regulator with breakdown protection'20169,325,276'Methods and apparatus for clock oscillator temperature coefficient trimming'20169,318,209'Digitally controlled source side select gate offset in 3D NAND memory erase'20169,293,195'Compact high speed sense amplifier for non-volatile memory'20169,208,895'Cell current control through power supply'20159,154,027'Dynamic load matching charge pump for reduced current consumption'20159,120,814'Compounds with embedded benzopyran motif for core structures and preparation method thereof'20158,985,630'Cradle assembly attachable to a vehicle'20158,898,341'Method of allocating unique identifier and battery management system using the same'20148,842,471'Charge cycling by equalizing and regulating the source, well, and bit line levels during write operations for NAND flash memory: program to verify transition'20148,830,745'Memory system with unverified program step'20148,811,075'Charge cycling by equalizing and regulating the source, well, and bit line levels during write operations for NAND flash memory: verify to program transition'20148,760,957'Non-volatile memory and method having a memory array with a high-speed, short bit-line portion'20148,737,132'Charge cycling by equalizing the source and bit line levels between pulses during no-verify write operations for NAND flash memory'20148,681,548'Column redundancy circuitry for non-volatile memory'20148,665,033'Varactorless tunable oscillator'20148,427,884'Bit scan circuits and method in non-volatile memory'20138,395,434'Level shifter with negative voltage capability'20138,341,449'Battery management system and method for transferring data within the battery management system'20127,867,663'Heat exchanging system of battery pack using thermoelectric element'20117,782,016'Hybrid-typed battery pack operated in high efficiency'20107,768,252'Systems and methods for determining sensing thresholds of a multi-resolution spectrum sensing (MRSS) technique for cognitive radio (CR) systems'20107,642,003'Sealed type heat exchanging system of battery pack'20107,550,949'Process for controlling temperature of battery pack'20097,528,751'Systems, methods, and apparatuses for a long delay generation technique for spectrum-sensing of cognitive radios'20097,482,962'Systems, methods, and apparatuses for digital wavelet generators for Multi-Resolution Spectrum Sensing of Cognitive Radio applications'20097,479,786'Member for measurement of cell voltage and temperature in battery pack'20097,405,022'Secondary battery pack having configuration of alternative orientation'20087,126,854'Technique for programming floating-gate transistor used in circuitry as flash EPROM'20067,046,551'Nonvolatile memories with asymmetric transistors, nonvolatile memories with high voltage lines extending in the column direction, and nonvolatile memories with decoding circuits sharing a common area'20066,987,695'Writing data to nonvolatile memory'20066,975,544'Voltage discharge technique for controlling threshold-voltage characteristics of floating-gate transistor in circuitry such as flash EPROM'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2006Based in Fremont, CA, US· patent location history
2008–2020Patents assigned to LG CHEMICAL LTD (11)· patent assignee history
2008–2020Based in Daejeon, KR· patent location history
2012–2015Patents assigned to PARK JONGMIN (10)· patent assignee history
2013–2017Patents assigned to SANDISK TECHNOLOGIES INC (18)· patent assignee history
2013–2018Based in Cupertino, CA, US· patent location history
2015–2019Based in Seoul, KR· patent location history
2016–2020Patents assigned to LG DISPLAY CO LTD (8)· patent assignee history
2016–2018Patents assigned to SANDISK TECHNOLOGIES LLC (7)· patent assignee history
2016–2020Based in Anyang-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SANDISK TECHNOLOGIES INC | 18 | 2013–2017 |
| LG CHEMICAL LTD | 11 | 2008–2020 |
| PARK JONGMINself | 10 | 2012–2015 |
| LG DISPLAY CO LTD | 8 | 2016–2020 |
| SANDISK TECHNOLOGIES LLC | 7 | 2016–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cupertino, California, US | 22 | 2013–2018 |
| Daejeon, KR | 10 | 2008–2020 |
| Anyang-si, KR | 7 | 2016–2020 |
| Seoul, KR | 5 | 2015–2019 |
| Fremont, California, US | 4 | 2005–2006 |