Inventor
Anthony Yap Wong
Inventor
Cupertino, CA, US
Overview
Patents· 30 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique46%
H04LTransmission of digital information, e.g. telegraphic communication15%
H10DInorganic electric semiconductor devices13%
F16HGearing8%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems8%
G06FElectric digital data processing5%
E06BFixed or movable closures for openings in buildings, vehicles, fences or like enclosures in general, e.g. doors, windows, blinds, gates3%
H03FAmplifiers3%
PatentTitleYear
9,816,598'Key pulley segment features, segment stack configuration, and cam and roller design and actuation in a synchronized segmentally interchanging pulley transmission system'20179,625,014'Synchronized segmentally interchanging pulley transmission system'20178,753,236'Synchronized segmentally interchanging pulley transmission system'20147,268,605'Technique for operating a delay circuit'20076,989,692'Substrate-sensing voltage sensor for voltage comparator with voltage-to-current converters for both reference and input voltages'20066,940,318'Accurate voltage comparator with voltage-to-current converters for both reference and input voltages'20056,693,480'Voltage booster with increased voltage boost using two pumping capacitors'20046,650,149'Latched active fail-safe circuit for protecting a differential receiver'20036,449,901'Security gate'20026,429,678'Capacitively-coupled extended swing zero-DC-power active termination with CMOS overshoot/undershoot clamps'20026,351,138'Zero-DC-power active termination with CMOS overshoot and undershoot clamps'20026,288,577'Active fail-safe detect circuit for differential receiver'20016,288,581'Low-voltage differential-signalling output buffer with pre-emphasis'20016,285,256'Low-power CMOS voltage follower using dual differential amplifiers driving high-current constant-voltage push-pull output buffer'20016,144,241'Versatile gate-array cell with interstitial transistors for compact flip-flops with set or clear'20006,081,004'BiCMOS compacted logic array'20005,946,204'Voltage booster with reduced Vpp current and self-timed control loop without pulse generator'19995,847,946'Voltage booster with pulsed initial charging and delayed capacitive boost using charge-pumped delay line'19985,764,710'Meta-stable-resistant front-end to a synchronizer with asynchronous clear and asynchronous second-stage clock selector'19985,754,060'Electronic system including high performance backplane driver/receiver circuits'19985,594,370'High performance backplane driver circuit'19975,576,642'Electronic system including high performance backplane driver/receiver circuits'19965,491,432'CMOS Differential driver circuit for high offset ground'19965,444,397'All-CMOS high-impedance output buffer for a bus driven by multiple power-supply voltages'19955,408,146'High performance backplane driver circuit'19955,404,033'Application specific integrated circuit and placement and routing software with non-customizable first metal layer and vias and customizable second metal grid pattern'19954,987,324'High-speed CMOS buffer with controlled slew rate'19914,884,118'Double metal HCMOS compacted array'19894,859,870'Two-mode driver circuit'19894,634,904'CMOS power-on reset circuit'1987Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1987–2000Patents assigned to LSI LOGIC CORP (8)· patent assignee history
1987–2006Based in Cupertino, CA, US· patent location history
1995–2006Patents assigned to PERICOM SEMICONDUCTOR CORP (14)· patent assignee history
1995–2000Based in Saratoga, CA, US· patent location history
2002Based in Franklin, MA, US· patent location history
2007Based in Daly City, CA, US· patent location history
2014–2017Patents assigned to 1783590 ONTARIO LTD (3)· patent assignee history
2014Patents assigned to BOTERRO PAUL (1)· patent assignee history
2014–2017Based in Scarborough, CA· patent location history
2017Patents assigned to INMOTIVE INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| PERICOM SEMICONDUCTOR CORP | 14 | 1995–2006 |
| LSI LOGIC CORP | 8 | 1987–2000 |
| 1783590 ONTARIO LTD | 3 | 2014–2017 |
| INMOTIVE INC | 2 | 2017 |
| BOTERRO PAUL | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cupertino, California, US | 16 | 1987–2006 |
| Saratoga, California, US | 9 | 1995–2000 |
| Scarborough, CA | 3 | 2014–2017 |
| Daly City, California, US | 1 | 2007 |
| Franklin, Massachusetts, US | 1 | 2002 |