Inventor
Claude L. Bertin
Inventor
South Burlington, VT, US
Overview
Patents· 297 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores16%
B82YSpecific uses or applications of nanostructures13%
H10DInorganic electric semiconductor devices12%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
H10BElectronic memory devices8%
H10KOrganic electric solid-state devices7%
H01HElectric switches5%
H03KPulse technique3%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
PatentTitleYear
10,937,497Methods for accessing 1-R resistive change element arrays202110,937,498Methods for programing DDR compatible open architecture resistive change element arrays202110,885,978Nonvolatile nanotube switches with reduced switching voltages and currents202110,854,243Nonvolatile nanotube memory arrays using nonvolatile nanotube blocks and cell selection transistors202010,762,961Resistive change element arrays using a reference line202010,741,761Methods of making sealed resistive change elements202010,714,537Logic elements comprising carbon nanotube field effect transistor (CNTFET) devices and methods of making same202010,700,131Non-linear resistive change memory cells and arrays202010,546,859Double density nonvolatile nanotube switch memory cells202010,529,422Method for programming 1-R resistive change element arrays202010,403,683Methods for forming crosspoint arrays of resistive change memory cells201910,355,206Sealed resistive change elements201910,339,982Memory elements and cross point switches and arrays of same using nonvolatile nanotube blocks201910,340,005Resistive change element arrays with in situ initialization201910,290,349DDR compatible open array architectures for resistive change element arrays201910,249,684Resistive change elements incorporating carbon based diode select devices201910,204,682Nonvolatile nanotube switches and systems using same201910,192,619Methods for programming 1-R resistive change element arrays201910,096,601Stacked three-dimensional arrays of two terminal nanotube switching devices201810,002,908Logic elements comprising carbon nanotube field effect transistor (CNTFET) devices and methods of making same20189,917,139'Resistive change element array using vertically oriented bit lines'20189,911,743'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20189,852,793Methods for programming and accessing DDR compatible resistive change element arrays20179,783,255'Cross point arrays of 1-R nonvolatile resistive change memory cells using continuous nanotube fabrics'20179,767,902'Non-volatile composite nanoscopic fabric NAND memory arrays and methods of making same'20179,715,927'1-R resistive change element arrays using resistive reference elements'20179,601,498'Two-terminal nanotube devices and systems and methods of making same'20179,412,447'DDR compatible memory circuit architecture for resistive change element arrays'20169,406,349'Memory elements and cross point switches and arrays for same using nonvolatile nanotube blocks'20169,390,790'Carbon based nonvolatile cross point memory incorporating carbon based diode select devices and MOSFET select devices for memory and logic applications'20169,362,390'Logic elements comprising carbon nanotube field effect transistor (CNTFET) devices and methods of making same'20169,299,430'Methods for reading and programming 1-R resistive change element arrays'20169,287,356'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20169,196,615'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20159,007,732'Electrostatic discharge protection circuits using carbon nanotube field effect transistor (CNTFET) devices and methods of making same'20158,809,917'Memory elements and cross point switches and arrays of same using nonvolatile nanotube blocks'20148,699,268'Field effect devices controlled via a nanotube switching element'20148,659,940'Carbon nanotube-based neural networks and methods of making and using same'20148,631,562'Methods of making nanotube switches'20148,630,091'Carbon nanotubes for the selective transfer of heat from electronics'20148,587,989'NRAM arrays with nanotube blocks, nanotube traces, and nanotube planes and methods of making same'20138,580,586'Memory arrays using nanotube articles with reprogrammable resistance'20138,541,843'Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same'20138,513,768'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20138,471,238'Light emitters using nanotubes and methods of making same'20138,362,525'Field effect device having a channel of nanofabric and methods of making same'20138,357,559'Method of making sensor platform using a non-horizontally oriented nanotube element'20138,357,921'Integrated three-dimensional semiconductor system comprising nonvolatile nanotube field effect transistors'20138,319,205'Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same'20128,310,015'Sensor platform using a horizontally oriented nanotube element'20128,222,704'Compact electrical switching devices with nanotube elements, and methods of making same'20128,217,490'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20128,188,763'Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same'20128,183,665'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20128,125,039'One-time programmable, non-volatile field effect devices and methods of making same'20128,102,018'Nonvolatile resistive memories having scalable two-terminal nanotube switches'20128,013,363'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20118,008,745'Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements'20117,986,546'Non-volatile shadow latch using a nanotube switch'20117,985,906'Nanotube-based switching elements and logic circuits'20117,948,054'Two-terminal nanotube devices and systems and methods of making same'20117,948,082'Method of fabricating a patterned nanoscopic article'20117,944,735'Method of making a nanotube-based shadow random access memory'20117,943,464'Non-volatile electromechanical field effect devices and circuits using same and methods of forming same'20117,928,521'Non-tensioned carbon nanotube switch design and process for making same'20117,928,523'Non-volatile electromechanical field effect devices and circuits using same and methods of forming same'20117,927,992'Carbon nanotubes for the selective transfer of heat from electronics'20117,911,831'Nanotube-on-gate FET structures and applications'20117,906,991'Nanotube-based logic driver circuits'20117,884,430'Isolated metal plug process for use in fabricating carbon nanotube memory cells'20117,859,311'Integrated nanotube and field effect switching devices'20107,858,979'Method of aligning deposited nanotubes onto an etched feature using a spacer'20107,859,385'Resistive elements using carbon nanotubes'20107,855,403'Hybrid carbon nanotube FET (CNFET)-FET static RAM (SRAM) and method of making same'20107,852,114'Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same'20107,847,588'Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same'20107,839,176'Methods of making nanotube-based switching elements and logic circuits'20107,839,615'Nanotube ESD protective devices and corresponding nonvolatile and volatile nanotube switches'20107,835,170'Memory elements and cross point switches and arrays of same using nonvolatile nanotube blocks'20107,824,946'Isolated metal plug process for use in fabricating carbon nanotube memory cells'20107,786,540'Sensor platform using a non-horizontally oriented nanotube element'20107,782,652'Volatile nanotube-based switching elements with multiple controls'20107,781,862'Two-terminal nanotube devices and systems and methods of making same'20107,780,918'Sensor platform using a horizontally oriented nanotube element'20107,782,650'Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same'20107,777,222'Nanotube device structure and methods of fabrication'20107,768,304'Tri-state circuit using nanotube switching elements'20107,759,996'Storage elements using nanotube switching elements'20107,737,471'Receiver circuit using nanotube-based switches and transistors'20107,720,514'Receiver circuit using nanotube-based switches and logic'20107,709,880'Field effect devices having a gate controlled via a nanotube switching element'20107,710,157'Nanotube-based switching elements with multiple controls and logic circuits having said elements'20107,663,911'Isolation structure for deflectable nanotube elements'20107,652,337'Nanotube-based switching element'20107,652,342'Nanotube-based transfer devices and related circuits'20107,649,769'Circuit arrays having cells with combinations of transistors and nanotube switching elements'20107,598,544'Hybrid carbon nanotude FET(CNFET)-FET static RAM (SRAM) and method of making same'20097,598,127'Nanotube fuse structure'20097,595,527'Non-volatile electromechanical field effect devices and circuits using same and methods of forming same'20097,588,960'Nanotube device structure and methods of fabrication'20097,583,526'Random access memory including nanotube switching elements'20097,575,693'Method of aligning nanotubes and wires with an etched feature'20097,569,880'Non-volatile electromechanical field effect devices and circuits using same and methods of forming same'20097,567,414'Nanotube ESD protective devices and corresponding nonvolatile and volatile nanotube switches'20097,564,269'Integrated nanotube and field effect switching devices'20097,541,842'Nanotube-based switching elements and logic circuits'20097,542,334'Bistable latch circuit implemented with nanotube-based switching elements'20097,538,400'Sensor platform using a non-horizontally oriented nanotube element'20097,528,437'EEPROMS using carbon nanotubes for cell storage'20097,521,736'Electromechanical three-trace junction devices'20097,479,654'Memory arrays using nanotube articles with reprogrammable resistance'20097,416,993'Patterned nanowire articles on a substrate and methods of making the same'20087,405,605'Storage elements using nanotube switching elements'20087,394,268'Carrier for test, burn-in, and first level packaging'20087,394,687'Non-volatile-shadow latch using a nanotube switch'20087,385,266'Sensor platform using a non-horizontally oriented nanotube element'20087,365,632'Resistive elements using carbon nanotubes'20087,339,401'Nanotube-based switching elements with multiple controls'20087,329,931'Receiver circuit using nanotube-based switches and transistors'20087,330,709'Receiver circuit using nanotube-based switches and logic'20087,301,802'Circuit arrays having cells with combinations of transistors and nanotube switching elements'20077,294,877'Nanotube-on-gate FET structures and applications'20077,288,961'Tri-state circuit using nanotube switching elements'20077,289,357'Isolation structure for deflectable nanotube elements'20077,288,970'Integrated nanotube and field effect switching device'20077,280,394'Field effect devices having a drain controlled via a nanotube switching element'20077,276,775'Intrinsic dual gate oxide MOSFET using a damascene gate process'20077,274,064'Non-volatile electromechanical field effect devices and circuits using same and methods of forming same'20077,268,044'Non-volatile electromechanical field effect devices and circuits using same and methods of forming same'20077,265,575'Nanotube-based logic driver circuits'20077,245,520'Random access memory including nanotube switching elements'20077,226,816'Method of forming connection and anti-fuse in layered substrate such as SOI'20077,211,854'Field effect devices having a gate controlled via a nanotube switching element'20077,176,505'Electromechanical three-trace junction devices'20077,167,026'Tri-state circuit using nanotube switching elements'20077,164,744'Nanotube-based logic driver circuits'20077,161,403'Storage elements using nanotube switching elements'20077,161,218'One-time programmable, non-volatile field effect devices and methods of making same'20077,138,832'Nanotube-based switching elements and logic circuits'20067,132,841'Carrier for test, burn-in, and first level packaging'20067,115,901'Non-volatile electromechanical field effect devices and circuits using same and methods of forming same'20067,115,960'Nanotube-based switching elements'20067,112,493'Method of making non-volatile field effect devices and arrays of same'20067,113,426'Non-volatile RAM cell and array using nanotube switch position for information state'20067,075,141'Four terminal non-volatile transistor device'20067,071,023'Nanotube device structure and methods of fabrication'20067,045,421'Process for making bit selectable devices having elements made with nanotubes'20066,995,046'Process for making byte erasable devices having elements made with nanotubes'20066,990,009'Nanotube-based switching elements with multiple controls'20066,982,903'Field effect devices having a source controlled via a nanotube switching element'20066,972,220'Structures and methods of anti-fuse formation in SOI'20056,944,054'NRAM bit selectable two-device nanotube array'20056,943,452'Coaxial wiring within SOI semiconductor, PCB to system for high speed operation and signal quality'20056,879,638'Method and apparatus for providing communication between electronic devices'20056,812,122'Method for forming a voltage programming element'20046,802,033'Low-power critical error rate communications controller'20046,633,055'Electronic fuse structure and method of manufacturing'20036,596,592'Structures and methods of anti-fuse formation in SOI'20036,574,763'Method and apparatus for semiconductor integrated circuit testing and burn-in'20036,570,806'System and method for improving DRAM single cell fail fixability and flexibility repair at module level and universal laser fuse/anti-fuse latch therefor'20036,567,950'Dynamically replacing a failed chip'20036,541,837'Charge-coupled device wafer cover plate with compact interconnect wiring'20036,531,410'Intrinsic dual gate oxide MOSFET using a damascene gate process'20036,518,112'High performance, low power vertical integrated CMOS devices'20036,496,037'Automatic off-chip driver adjustment based on load characteristics'20026,455,778'Micro-flex technology in semiconductor packages'20026,444,490'Micro-flex technology in semiconductor packages'20026,436,749'Method for forming mixed high voltage (HV/LV) transistors for CMOS devices using controlled gate depletion'20026,437,385'Integrated circuit capacitor'20026,433,618'Variable power device with selective threshold control'20026,426,530'High performance direct coupled FET memory cell'20026,426,904'Structures for wafer level test and burn-in'20026,420,925'Programmable latch device with integrated programmable element'20026,410,431'Through-chip conductors for low inductance chip-to-chip integration and off-chip connections'20026,396,120'Silicon anti-fuse structures, bulk and silicon on insulator fabrication methods and application'20026,396,121'Structures and methods of anti-fuse formation in SOI'20026,388,305'Electrically programmable antifuses and methods for forming the same'20026,388,198'Coaxial wiring within SOI semiconductor, PCB to system for high speed operation and signal quality'20026,384,666'Antifuse latch device with controlled current programming and variable trip point'20026,369,671'Voltage controlled transmission line with real-time adaptive control'20026,358,627'Rolling ball connector'20026,346,846'Methods and apparatus for blowing and sensing antifuses'20026,345,362'Managing Vt for reduced power using a status table'20026,339,559'Decode scheme for programming antifuses arranged in banks'20026,319,745'Formation of charge-coupled-device with image pick-up array'20016,300,687'Micro-flex technology in semiconductor packages'20016,297,531'High performance, low power vertical integrated CMOS devices'20016,294,942'Method and apparatus for providing self-terminating signal lines'20016,294,406'Highly integrated chip-on-chip packaging'20016,271,059'Chip interconnection structure using stub terminals'20016,268,748'Module with low leakage driver circuits and method of operation'20016,266,272'Partially non-volatile dynamic random access memory formed by a plurality of single transistor cells used as DRAM cells and EPROM cells'20016,255,208'Selective wafer-level testing and burn-in'20016,255,899'Method and apparatus for increasing interchip communications rates'20016,243,283'Impedance control using fuses'20016,239,649'Switched body SOI (silicon on insulator) circuits and fabrication method therefor'20016,233,184'Structures for wafer level test and burn-in'20016,222,276'Through-chip conductors for low inductance chip-to-chip integration and off-chip connections'20016,222,395'Single-ended semiconductor receiver with built in threshold voltage difference'20016,219,215'Chip thermal protection device'20016,195,027'Capacitive precharging and discharging network for converting N bit input into M bit output'20016,178,517'High bandwidth DRAM with low operating power modes'20016,177,809'Redundant input/output driver circuit'20016,177,818'Complementary depletion switch body stack off-chip driver'20016,177,807'High frequency valid data strobe'20016,177,729'Rolling ball connector'20016,174,763'Three-dimensional SRAM trench structure and fabrication method therefor'20016,141,245'Impedance control using fuses'20006,137,129'High performance direct coupled FET memory cell'20006,136,655'Method of making low voltage active body semiconductor device'20006,111,425'Very low power logic circuit family with enhanced noise immunity'20006,097,243'Device and method to reduce power consumption in integrated semiconductor devices using a low power groggy mode'20006,097,241'ASIC low power activity detector to change threshold voltage'20006,070,262'Reconfigurable I/O DRAM'20006,060,746'Power transistor having vertical FETs and method for making same'20006,030,855'Self-aligned connector for stacked chip module'20005,998,847'Low voltage active body semiconductor device'19995,986,962'Internal shadow latch'19995,977,640'Highly integrated chip-on-chip packaging'19995,955,818'Machine structures fabricated of multiple microstructure layers'19995,956,575'Microconnectors'19995,946,545'Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit'19995,943,254'Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes'19995,923,181'Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module'19995,920,101'Structure for making sub-lithographic images by the intersection of two spacers'19995,909,400'Three device BICMOS gain cell'19995,907,178'Multi-view imaging apparatus'19995,903,059'Microconnectors'19995,903,045'Self-aligned connector for stacked chip module'19995,896,404'Programmable burst length DRAM'19995,880,988'Reference potential for sensing data in electronic storage element'19995,869,896'Packaged electronic module and integral sensor array'19995,870,350'High performance, high bandwidth memory bus architecture utilizing SDRAMs'19995,834,818'Structure for making sub-lithographic images by the intersection of two spacers'19985,818,748'Chip function separation onto separate stacked chips'19985,811,868'Integrated high-performance decoupling capacitor'19985,807,791'Methods for fabricating multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes'19985,804,464'Semiconductor chip kerf clear method for forming semiconductor chips and electronic module therefore'19985,798,282'Semiconductor stack structures and fabrication sparing methods utilizing programmable spare circuit'19985,786,628'Method and workpiece for connecting a thin layer to a monolithic electronic modules surface and associated module packaging'19985,781,031'Programmable logic array'19985,763,318'Method of making a machine structures fabricated of mutiple microstructure layers'19985,763,943'Electronic modules with integral sensor arrays'19985,761,114'Multi-level storage gain cell with stepline'19985,757,693'Gain memory cell with diode'19985,731,945'Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes'19985,719,438'Method and workpiece for connecting a thin layer to a monolithic electronic module\'s surface and associated module packaging'19985,714,039'Method for making sub-lithographic images by etching the intersection of two spacers'19985,712,190'Process for controlling distance between integrated circuit chips in an electronic module'19985,702,984'Integrated mulitchip memory module, structure and fabrication'19975,686,843'Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module'19975,670,803'Three-dimensional SRAM trench structure and fabrication method therefor'19975,670,428'Semiconductor chip kerf clear method and resultant semiconductor chip and electronic module formed from the same'19975,656,544'Process for forming a polysilicon electrode in a trench'19975,648,684'Endcap chip with conductive, monolithic L-connect for multichip stack'19975,644,162'Semiconductor chip having chip metal layer and transfer metal layer composed of same metal, and corresponding electronic module'19975,617,351'Three-dimensional direct-write EEPROM arrays and fabrication methods'19975,614,277'Monolithic electronic modules--fabrication and structures'19975,604,755'Memory system reset circuit'19975,596,226'Semiconductor chip having a chip metal layer and a transfer metal and corresponding electronic module'19975,571,754'Method of fabrication of endcap chip with conductive, monolithic L-connect for multichip stack'19965,567,654'Method and workpiece for connecting a thin layer to a monolithic electronic module\'s surface and associated module packaging'19965,567,653'Process for aligning etch masks on an integrated circuit surface using electromagnetic energy'19965,563,086'Integrated memory cube, structure and fabrication'19965,561,622'Integrated memory cube structure'19965,532,519'Cube wireability enhancement with chip-to-chip alignment and thickness control'19965,517,754'Fabrication processes for monolithic electronic modules'19965,517,057'Electronic modules with interconnected surface metallization layers'19965,506,753'Method and apparatus for a stress relieved electronic module'19965,502,667'Integrated multichip memory module structure'19965,502,333'Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit'19965,478,781'Polyimide-insulated cube package of stacked semiconductor device chips'19955,468,663'Method of fabricating three-dimensional direct-write EEPROM arrays'19955,466,634'Electronic modules with interconnected surface metallization layers and fabrication methods therefore'19955,467,305'Three-dimensional direct-write EEPROM arrays and fabrication methods'19955,426,566'Multichip integrated circuit packages and systems'19955,414,637'Intra-module spare routing for high density electronic packages'19955,399,516'Method of making shadow RAM cell having a shallow trench EEPROM'19955,309,318'Thermally enhanced semiconductor chip package'19945,270,261'Three dimensional multichip package methods of fabrication'19935,202,754'Three-dimensional multichip packages and methods of fabrication'19935,196,722'Shadow ram cell having a shallow trench eeprom'19935,096,849'Process for positioning a mask within a concave semiconductor structure'19925,055,898'DRAM memory cell having a horizontal SOI transfer device disposed over a buried storage node and fabrication methods therefor'19914,805,142'Multiple ROM data state, read/write memory cell'19894,603,341'Stacked double dense read only memory'19864,602,170'Resistive gate field effect transistor logic family'19864,583,201'Resistor personalized memory device using a resistive gate fet'1986RE032071'Resistive gate FET flip-flop storage cell'19864,555,721'Structure of stacked, complementary MOS field effect transistor circuits'19854,467,518'Process for fabrication of stacked, complementary MOS field effect transistor circuits'19844,388,704'Non-volatile RAM cell with enhanced conduction insulators'19834,280,855'Method of making a dual DMOS device by ion implantation and diffusion'19814,259,366'Fabrication method for forming FET gate electrode'19814,198,696'Laser cut storage cell'19804,158,239'Resistive gate FET flip-flop storage cell'19794,139,935'Over voltage protective device and circuits for insulated gate transistors'1979Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1979–2008Patents assigned to IBM (149)· patent assignee history
1979Based in Oakton, VA, US· patent location history
1980–2014Based in South Burlington, VT, US· patent location history
1986–2011Based in Burlington, VT, US· patent location history
1998–1999Based in Chittenden County, VT, US· patent location history
2005–2021Patents assigned to NANTERO INC (147)· patent assignee history
2009–2021Based in Venice, FL, US· patent location history
2012–2018Patents assigned to BERTIN CLAUDE L (26)· patent assignee history
2012–2018Patents assigned to RUECKES THOMAS (20)· patent assignee history
2012–2018Patents assigned to MEINHOLD MITCHELL (9)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 149 | 1979–2008 |
| NANTERO INC | 147 | 2005–2021 |
| BERTIN CLAUDE Lself | 26 | 2012–2018 |
| RUECKES THOMAS | 20 | 2012–2018 |
| MEINHOLD MITCHELL | 9 | 2012–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| South Burlington, VT, US | 181 | 1980–2014 |
| Venice, Florida, US | 75 | 2009–2021 |
| Burlington, VT, US | 36 | 1986–2011 |
| Chittenden County, VT, US | 3 | 1998–1999 |
| Oakton, Virginia, US | 2 | 1979 |