Inventor
Mako Kobayashi
Inventor
Hyogo, JP
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores44%
G05FSystems for regulating electric or magnetic variables30%
H03KPulse technique7%
H10DInorganic electric semiconductor devices7%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications4%
PatentTitleYear
6,768,354'Multi-power semiconductor integrated circuit device'20046,700,434'Substrate bias voltage generating circuit'20046,515,934'Semiconductor device including internal potential generating circuit allowing tuning in short period of time and reduction of chip area'20036,515,461'Voltage downconverter circuit capable of reducing current consumption while keeping response rate'20036,472,926'Internal voltage generation circuit'20026,429,729'Semiconductor integrated circuit device having circuit generating reference voltage'20026,424,134'Semiconductor integrated circuit device capable of stably generating internal voltage independent of an external power supply voltage'20026,414,881'Semiconductor device capable of generating internal voltage effectively'20026,392,472'Constant internal voltage generation circuit'20026,337,506'Semiconductor memory device capable of performing stable operation for noise while preventing increase in chip area'20026,333,669'Voltage converting circuit allowing control of current drivability in accordance with operational frequency'20016,331,962'Semiconductor device including voltage down converter allowing tuning in short period of time and reduction of chip area'20016,316,985'Substrate voltage generating circuit provided with a transistor having a thin gate oxide film and a semiconductor integrated circuit device provided with the same'20016,272,034'Semiconductor memory device'20016,215,720'High speed operable semiconductor memory device with memory blocks arranged about the center'20016,072,743'High speed operable semiconductor memory device with memory blocks arranged about the center'20006,064,621'Multi-bank clock synchronous type semiconductor memory device having improved memory array and power supply arrangement'20005,914,907'Semiconductor memory device capable of increasing chip yields while maintaining rapid operation'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2004Patents assigned to MITSUBISHI ELECTRIC CORP (17)· patent assignee history
1999–2004Based in Hyogo, JP· patent location history
2002–2004Patents assigned to MITSUBISHI ELECTRIC ENG (7)· patent assignee history
2004Patents assigned to RENESAS TECH CORP (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 17 | 1999–2004 |
| MITSUBISHI ELECTRIC ENG | 7 | 2002–2004 |
| RENESAS TECH CORP | 1 | 2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hyogo, JP | 18 | 1999–2004 |