Inventor

Chi Kong Lee

Inventor
Fremont, CA, US

Overview

26→
Patents
2011–2017
Patent span
Physics
Primary field (CPC G)

Patents· 26 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing57%
G11CStatic stores24%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use12%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications7%
PatentTitleYear
9,773,557'Multi-plane data order'20179,547,444'Selectively scheduling memory accesses in parallel based on access speeds of memory'20179,348,536'Flexible sequence design architecture for solid state memory controller'20169,218,284'Storage device command interval controller'20159,183,141'Method and apparatus for parallel transfer of blocks of data between an interface module and a non-volatile semiconductor memory'20159,158,675'Architecture for storage of data on NAND flash memory'20159,152,553'Generic command descriptor for controlling memory devices'20159,147,470'NAND flash controller with programmable command templates'20159,146,824'Management of bit line errors based on a stored set of data'20159,141,538'Apparatus and method for generating descriptors to transfer data to and from non-volatile semiconductor memory of a storage drive'20159,081,668'Architecture to allow efficient storage of data on NAND flash memory'20158,964,498'Systems and methods for reducing peak power consumption in a solid state drive controller'20158,874,874'Method and storage drive for writing portions of blocks of data in respective arrays of memory cells of corresponding integrated circuits'20148,868,852'Interface management control systems and methods for non-volatile semiconductor memory'20148,788,781'Descriptor scheduler'20148,762,654'Selectively scheduling memory accesses in parallel based on access speeds of memory'20148,645,656'Flash memory controller'20148,626,995'Flexible sequence design architecture for solid state memory controller'20148,539,195'Non-volatile memory device with non-evenly distributable data access'20138,438,356'Flash memory controller'20138,296,487'SATA pass through port'20128,255,615'Flexible sequence design architecture for solid state memory controller'20128,219,775'Nonvolatile memory system'20128,185,713'Flexible sequencer design architecture for solid state memory controller'20128,140,724'SATA pass through port'20128,019,959'Nonvolatile memory system'2011

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2017Patents assigned to MARVELL WORLD TRADE LTD (15)· patent assignee history
2011–2017Based in Fremont, CA, US· patent location history
2012–2017Patents assigned to MARVELL INT LTD (11)· patent assignee history
2012–2014Patents assigned to YOON TONY (8)· patent assignee history
2012–2014Patents assigned to LEE CHI KONG (7)· patent assignee history
2012–2017Patents assigned to LEE CHI-KONG (5)· patent assignee history
2015Based in Freemont, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MARVELL WORLD TRADE LTD152011–2017
MARVELL INT LTD112012–2017
YOON TONY82012–2014
LEE CHI KONGself72012–2014
LEE CHI-KONGself52012–2017
Locations
LocationPatentsSpan
Fremont, California, US252011–2017
Freemont, California, US12015