Inventor

Huixiong Dai

Inventor
San Jose, CA, US

Overview

22→
Patents
2011–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 22 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1033%
H01LSemiconductor devices22%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices17%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
C23CCoating metallic material7%
H01JElectric discharge tubes or discharge lamps5%
B08BCleaning in general2%
C23FNon-mechanical removal of metallic material from surface2%
H10DInorganic electric semiconductor devices2%
PatentTitleYear
10,825,665Directional treatment for multi-dimensional device processing202010,643,895Self-aligned interconnects formed using subtractive techniques202010,545,408Performance improvement of EUV photoresist by ion implantation202010,381,232Techniques for manipulating patterned features using ions201910,234,772Overlay error correction201910,008,384Techniques to engineer nanoscale patterned features using ions20189,984,889Techniques for manipulating patterned features using ions20189,864,280'Overlay error correction'20189,815,091'Roll to roll wafer backside particle and contamination removal'20179,761,489'Self-aligned interconnects formed using substractive techniques'20179,748,148'Localized stress modulation for overlay and EPE'20179,728,406'Multi materials and selective removal enabled reverse tone process'20179,716,012'Methods of selective layer deposition'20179,478,421'Optically tuned hardmask for multi-patterning applications'20169,411,237'Resist hardening and development processes for semiconductor device manufacturing'20169,343,309'Lateral oxidation process flows'20169,337,051'Method for critical dimension reduction using conformal carbon films'20169,177,796'Optically tuned hardmask for multi-patterning applications'20158,501,395'Line edge roughness reduction and double patterning'20138,357,618'Frequency doubling using a photo-resist template mask'20138,293,460'Double exposure patterning with carbonaceous hardmask'20127,901,869'Double patterning with a double layer cap on carbonaceous hardmask'2011

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2020Patents assigned to APPLIED MATERIALS INC (18)· patent assignee history
2011–2020Based in San Jose, CA, US· patent location history
2012–2013Patents assigned to DAI HUIXIONG (3)· patent assignee history
2012–2013Patents assigned to XU XUMOU (2)· patent assignee history
2012Patents assigned to BENCHER CHRISTOPHER D (1)· patent assignee history
2018–2020Patents assigned to VARIAN SEMICONDUCTOR EQUIPMENT ASS INC (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
APPLIED MATERIALS INC182011–2020
VARIAN SEMICONDUCTOR EQUIPMENT ASS INC42018–2020
DAI HUIXIONGself32012–2013
XU XUMOU22012–2013
BENCHER CHRISTOPHER D12012
Locations
LocationPatentsSpan
San Jose, California, US222011–2020