Inventor

Joseph Ku

Inventor
Palo Alto, CA, US

Overview

22→
Patents
2000–2014
Patent span
Physics
Primary field (CPC G)

Patents· 22 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing18%
G11CStatic stores18%
G01RMeasuring electric variables9%
H03KPulse technique9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
H01QAntennas, i.e. radio aerials6%
H04LTransmission of digital information, e.g. telegraphic communication6%
D21JFibreboard3%
G05FSystems for regulating electric or magnetic variables3%
G06KGraphical data reading3%
PatentTitleYear
8,631,247'System and method for hardware based security'20148,606,206'Traveling wave beamforming network'20137,432,816'Printed circuit board with RFID antenna'20087,248,518'Self-timed memory device providing adequate charging time for selected heaviest loading row'20077,183,924'Storing configuration information and a service record for an item in an RFID tag'20077,087,439'Method and apparatus for thermally assisted testing of integrated circuits'20066,982,197'Method and apparatus for building up large scale on chip de-coupling capacitor on standard CMOS/SOI technology'20066,940,770'Method for precharging word and bit lines for selecting memory cells within a memory array'20056,910,155'System and method for chip testing'20056,907,534'Minimizing power consumption in pipelined circuit by shutting down pipelined circuit in response to predetermined period of time having expired'20056,889,349'Digital event sampling circuit and method'20056,886,117'Field repairable embedded memory in system-on-a-chip'20056,874,014'Chip multiprocessor with multiple operating systems'20056,851,064'Fine-grained thermal control in memory subsystems'20056,826,112'Low power logic gate'20046,600,328'Analog method and circuit for monitoring digital events performance'20036,504,746'High-density low-cost read-only memory circuit'20036,492,854'Power efficient and high performance flip-flop'20026,384,331'Secured reinforcing support device for a heat sink'20026,351,172'High-speed output driver with an impedance adjustment scheme'20026,347,029'Over-current protection circuit for linear voltage regulators'20026,145,062'Selective conflict write flush'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000Based in Portland, OR, US· patent location history
2002Patents assigned to DMEL INC (2)· patent assignee history
2002–2003Patents assigned to HEWLETT PACKARD CO (2)· patent assignee history
2002–2008Based in Palo Alto, CA, US· patent location history
2002Based in Chung-Ho, TW· patent location history
2003–2008Patents assigned to HEWLETT PACKARD DEVELOPMENT CO (14)· patent assignee history
2013–2014Patents assigned to KU JOSEPH (2)· patent assignee history
2013–2014Based in San Jose, CA, US· patent location history
2014Patents assigned to CAMPAGNA MATTHEW J (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
HEWLETT PACKARD DEVELOPMENT CO142003–2008
DMEL INC22002
HEWLETT PACKARD CO22002–2003
KU JOSEPHself22013–2014
CAMPAGNA MATTHEW J12014
Locations
LocationPatentsSpan
Palo Alto, California, US182002–2008
San Jose, California, US22013–2014
Chung-Ho, TW12002
Portland, OR, US12000