Inventor
Giap H. Tran
Inventor
San Jose, CA, US
Overview
Patents· 33 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique64%
G06FElectric digital data processing14%
LOC147%
G11CStatic stores5%
G05FSystems for regulating electric or magnetic variables2%
H02HEmergency protective circuit arrangements2%
H03MCoding2%
H10DInorganic electric semiconductor devices2%
PatentTitleYear
D0922410Display panel or portion thereof with a graphical user interface2021D0920992Display panel or portion thereof with a graphical user interface2021D0921015Display panel or portion thereof with a graphical user interface20219,515,643'Hot-socket circuitry'20169,287,872'PVT compensation scheme for output buffers'20167,787,326'Programmable logic device with a multi-data rate SDRAM interface'20107,558,143'Programmable logic device with power-saving architecture'20097,411,419'Input/output systems and methods'20087,376,037'Programmable logic device with power-saving architecture'20087,342,838'Programmable logic device with a double data rate SDRAM interface'20087,098,685'Scalable serializer-deserializer architecture and programmable interface'20067,061,269'I/O buffer architecture for programmable devices'20066,621,298'Variable grain architecture for FPGA integrated circuits'20036,590,415'Methods for configuring FPGA\'s having variable grain components for providing time-shared access to interconnect resources'20036,526,558'Methods for configuring FPGA\'s having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources'20036,380,759'Variable grain architecture for FPGA integrated circuits'20026,292,930'Methods for configuring FPGA\'s having variable grain blocks and shared logic for providing time-shared access to interconnect resources'20016,275,064'Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuits'20016,249,144'Methods for configuring FPGA\'s having variable grain components for providing time-shared access to interconnect resources'20016,218,857'Variable sized line driving amplifiers for input/output blocks (IOBs) in FPGA integrated circuits'20016,216,257'FPGA device and method that includes a variable grain function architecture for implementing configuration logic blocks and a complimentary variable length interconnect architecture for providing configurable routing between configuration logic blocks'20016,204,686'Methods for configuring FPGA\'s having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources'20016,191,612'Enhanced I/O control flexibility for generating control signals'20016,154,051'Tileable and compact layout for super variable grain blocks within FPGA device'20006,150,842'Variable grain architecture for FPGA integrated circuits'20006,130,551'Synthesis-friendly FPGA architecture with variable length and variable timing interconnect'20006,124,730'Methods for configuring FPGA\'s having variable grain components for providing time-shared access to interconnect resources'20006,107,823'Programmable control multiplexing for input/output blocks (IOBs) in FPGA integrated circuits'20006,100,715'Methods for configuring FPGA\'s having variable grain blocks and logic for providing time-shared access to interconnect resources'20006,097,212'Variable grain architecture for FPGA integrated circuits'20005,990,702'Flexible direct connections between input/output blocks (IOBs) and variable grain blocks (VGBs) in FPGA integrated circuits'19995,982,193'Input/output block (IOB) connections to MaxL lines, nor lines and dendrites in FPGA integrated circuits'19995,436,579'Input transition detection circuit for zero-power part'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995Patents assigned to ADVANCED MICRO DEVICES INC (1)· patent assignee history
1995–2016Based in San Jose, CA, US· patent location history
1999–2002Patents assigned to VANTIS CORP (16)· patent assignee history
2000–2016Patents assigned to LATTICE SEMICONDUCTOR CORP (13)· patent assignee history
2016Patents assigned to LATTICESEMICONDUCTORCORPORATION (1)· patent assignee history
2021Patents assigned to MAGIC LEAP INC (3)· patent assignee history
2021Based in Miami, FL, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| VANTIS CORP | 16 | 1999–2002 |
| LATTICE SEMICONDUCTOR CORP | 13 | 2000–2016 |
| MAGIC LEAP INC | 3 | 2021 |
| ADVANCED MICRO DEVICES INC | 1 | 1995 |
| LATTICESEMICONDUCTORCORPORATION | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 30 | 1995–2016 |
| Miami, Florida, US | 3 | 2021 |