Inventor

Wolf-Dietrich Weber

Inventor
San Jose, CA, US

Overview

56→
Patents
1998–2020
Patent span
Physics
Primary field (CPC G)

Patents· 56 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing45%
H04LTransmission of digital information, e.g. telegraphic communication18%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use14%
H05KPrinted circuits11%
H02JElectric power networks2%
Y04SSystems integrating technologies related to power network operation, communication or information technologies for improving the electrical power generation, transmission, distribution, management or usage, i.e. smart grids2%
B60LPropulsion of electrically-propelled vehicles1%
F24FAir-conditioning1%
G05BControl or regulating systems in general1%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes1%
PatentTitleYear
10,558,768Computer and data center load determination202010,377,265Mediator device for smart electric vehicle charging201910,339,227Data center design201910,101,050Dispatch engine for optimizing demand-response thermostat events20189,946,815Computer and data center load determination20189,660,458'Electrical load management'20178,949,646'Data center load monitoring for utilizing an access power amount based on a projected peak power usage and a monitored power usage'20158,832,476'Power allotment distribution in a data center'20148,700,929'Load control in a data center'20148,645,722'Computer and data center load determination'20148,621,248'Load control in a data center'20138,601,287'Computer and data center load determination'20138,595,515'Powering a data center'20138,504,992'Method and apparatus for establishing a quality of service model'20138,443,422'Methods and apparatus for a configurable protection architecture for on-chip systems'20138,024,697'Various methods and apparatuses for estimating characteristics of an electronic systems design'20118,015,366'Accessing memory and processor caches of nodes in multi-node configurations'20118,004,831'Orthogonally system arrangements for data center facility'20117,934,131'Server farm diagnostic and status system'20117,793,345'Method and apparatus for a configurable protection architecture for on-chip systems'20107,724,518'Orthogonally system arrangements for data center facility'20107,694,249'Various methods and apparatuses for estimating characteristics of an electronic system\'s design'20107,665,069'Method and apparatus for establishing a quality of service model'20107,660,932'Composing on-chip interconnects with configurable interfaces'20107,603,441'Method and apparatus for automatic configuration of multiple on-chip interconnects'20097,543,088'Various methods and apparatuses for width and burst conversion'20097,475,168'Various methods and apparatus for width and burst conversion'20097,418,556'Accessing memory and processor caches of nodes in multi-node configurations'20087,406,582'Resolving crossing requests in multi-node configurations'20087,356,633'Composing on-chip interconnects with configurable interfaces'20087,302,691'Scalable low bandwidth multicast handling in mixed core systems'20077,296,105'Method and apparatus for configuring an interconnect to implement arbitration'20077,266,786'Method and apparatus for configurable address mapping and protection architecture and hardware for on-chip systems'20077,254,603'On-chip inter-network performance optimization using configurable performance parameters'20077,243,264'Method and apparatus for error handling in networks'20077,194,566'Communication system and method with configurable posting points'20077,194,561'Method and apparatus for scheduling requests to a resource using a configurable threshold'20077,191,273'Method and apparatus for scheduling a resource to meet quality-of-service restrictions'20077,165,094'Communications system and method with non-blocking shared interface'20077,149,829'Various methods and apparatuses for arbitration among blocks of functionality'20066,961,834'Method and apparatus for scheduling of requests to dynamic random access memory device'20056,804,757'Method and apparatus for scheduling requests using ordered stages of scheduling criteria'20046,804,738'Method and apparatus for scheduling a resource to meet quality-of-service restrictions'20046,799,217'Shared memory multiprocessor expansion port for multi-node systems'20046,785,753'Method and apparatus for response modes in pipelined environment'20046,631,448'Cache coherence unit for interconnecting multiprocessor nodes having pipelined snoopy protocol'20036,625,694'System and method for allocating a directory entry for use in multiprocessor-node data processing systems'20036,578,117'Method and apparatus for scheduling requests using ordered stages of scheduling criteria'20036,560,681'Split sparse directory for a distributed shared memory multiprocessor system'20036,490,630'System and method for avoiding deadlock in multi-node network'20026,393,023'System and method for acknowledging receipt of messages within a packet based communication network'20026,330,225'Communication system and method for different quality of service guarantees for different data flows'20016,212,610'Memory protection mechanism for a distributed shared memory multiprocessor with integrated message passing support'20016,209,064'Cache coherence unit with integrated message passing and memory protection for a distributed, shared memory multiprocessor system'20015,959,995'Asynchronous packet switching'19995,740,346'System and method for dynamic network topology exploration'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–2011Patents assigned to FUJITSU LTD (13)· patent assignee history
1998–2003Based in La Honda, CA, US· patent location history
2001–2013Patents assigned to SONICS INC (27)· patent assignee history
2001–2020Based in San Jose, CA, US· patent location history
2013–2015Patents assigned to WEBER WOLF-DIETRICH (9)· patent assignee history
2013–2019Patents assigned to FAN XIAOBO (8)· patent assignee history
2013–2019Patents assigned to BARROSO LUIZ ANDRE (7)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SONICS INC272001–2013
FUJITSU LTD131998–2011
WEBER WOLF-DIETRICHself92013–2015
FAN XIAOBO82013–2019
BARROSO LUIZ ANDRE72013–2019
Locations
LocationPatentsSpan
San Jose, California, US492001–2020
La Honda, California, US71998–2003