Inventor
John M. S. Neilson
Inventor
Norristown, PA, US
Overview
Patents· 49 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices54%
H01LSemiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
H03KPulse technique1%
PatentTitleYear
10,811,533Medium high voltage MOSFET device202010,741,684Integrated channel diode202010,573,718Vertical high-voltage MOS transistor202010,553,717Medium voltage MOSFET device20209,941,383Fast switching IGBT with embedded emitter shorting contacts and method for making same20189,881,995'MOSFET having dual-gate cells with an integrated channel diode'20189,673,317'Integrated termination for multiple trench field plate'20179,601,612'MOSFET having dual-gate cells with an integrated channel diode'20179,525,035'Vertical high-voltage MOS transistor and method of forming the same'20169,484,450'Integrated channel diode'20169,450,082'Integrated termination for multiple trench field plate'20169,385,196'Fast switching IGBT with embedded emitter shorting contacts and method for making same'20169,356,133'Medium voltage MOSFET device'20169,324,856'MOSFET having dual-gate cells with an integrated channel diode'20169,245,994'MOSFET with curved trench feature coupling termination trench to active trench'20169,230,851'Reduction of polysilicon residue in a trench for polysilicon trench filling processes'20169,136,381'Super junction MOSFET with integrated channel diode'20158,748,976'Dual RESURF trench field plate in vertical MOSFET'20148,294,210'High voltage channel diode'20128,288,820'High voltage power integrated circuit'20126,080,614'Method of making a MOS-gated semiconductor device with a single diffusion'20006,054,369'Lifetime control for semiconductor devices'20005,940,689'Method of fabricating UMOS semiconductor devices using a self-aligned, reduced mask process'19995,877,044'Method of making MOS-gated semiconductor devices'19995,468,668'Method of forming MOS-gated semiconductor devices having mesh geometry pattern'19955,455,442'COMFET switch and method'19955,424,563'Apparatus and method for increasing breakdown voltage ruggedness in semiconductor devices'19955,422,288'Method of doping a JFET region in a MOS-gated semiconductor device'19955,399,892'Mesh geometry for MOS-gated semiconductor devices'19955,382,825'Spiral edge passivation structure for semiconductor devices'19955,323,036'Power FET with gate segments covering drain regions disposed in a hexagonal pattern'19945,243,211'Power FET with shielded channels'19935,218,220'Power FET having reduced threshold voltage'19935,164,802'Power VDMOSFET with schottky on lightly doped drain of lateral driver FET'19925,095,343'Power MOSFET'19925,079,608'Power MOSFET transistor circuit with active clamp'19925,023,692'Power MOSFET transistor circuit'19914,639,762'MOSFET with reduced bipolar effects'19874,639,754'Vertical MOSFET with diminished bipolar effects'19874,631,564'Gate shield structure for power MOS device'19864,532,534'MOSFET with perimeter channel'19854,398,206'Transistor with integrated diode and resistor'19834,297,149'Method of treating SiPOS passivated high voltage semiconductor device'19814,292,646'Semiconductor thyristor device having integral ballast means'19814,214,255'Gate turn-off triac with dual low conductivity regions contacting central gate region'19804,199,386'Method of diffusing aluminum into monocrystalline silicon'19804,158,206'Semiconductor device'19794,156,248'Gate turn-off semiconductor controlled rectifier device with highly doped buffer region portion'19794,062,032'Gate turn off semiconductor rectifiers'1977Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1977–1987Patents assigned to RCA CORP (12)· patent assignee history
1977–1983Based in Mountaintop, PA, US· patent location history
1981Based in Bridgewater, NJ, US· patent location history
1985–2020Based in Norristown, PA, US· patent location history
1986–1987Based in Lower Providence, PA, US· patent location history
1992–1999Patents assigned to HARRIS CORP (14)· patent assignee history
2000Patents assigned to INTERSIL CORP (2)· patent assignee history
2012–2020Patents assigned to TEXAS INSTRUMENTS INC (20)· patent assignee history
2012–2016Patents assigned to NEILSON JOHN MANNING SAVIDGE (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TEXAS INSTRUMENTS INC | 20 | 2012–2020 |
| HARRIS CORP | 14 | 1992–1999 |
| RCA CORP | 12 | 1977–1987 |
| NEILSON JOHN MANNING SAVIDGEself | 3 | 2012–2016 |
| INTERSIL CORP | 2 | 2000 |
Locations
| Location | Patents | Span |
|---|---|---|
| Norristown, Pennsylvania, US | 39 | 1985–2020 |
| Mountaintop, Pennsylvania, US | 7 | 1977–1983 |
| Lower Providence, Pennsylvania, US | 2 | 1986–1987 |
| Bridgewater, New Jersey, US | 1 | 1981 |