Inventor
Clifford I. Drowley
Inventor
Shanghai, CN
Overview
Patents· 45 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H10DInorganic electric semiconductor devices13%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation12%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
H03HImpedance networks, e.g. resonant circuits4%
H10BElectronic memory devices3%
H05KPrinted circuits2%
H10NElectric solid-state devices not otherwise provided for2%
PatentTitleYear
10,978,421Wafer-level packaging method and package structure202110,910,286Wafer-level system-in-package packaging method and package structure thereof202110,910,274Backside processed semiconductor device202110,861,822Wafer-level packaging method and package structure thereof202010,804,177Wafer-level packaging method and package structure thereof202010,790,211Wafer-level packaging method and package structure thereof202010,784,229Wafer level package structure and wafer level packaging method202010,756,051Wafer-level system packaging method and package structure202010,700,663Resonator and related manufacturing method202010,693,431Manufacturing of thin-film bulk acoustic resonator and semiconductor apparatus comprising the same202010,686,422Manufacturing of thin-film bulk acoustic resonator and semiconductor apparatus comprising the same202010,511,284Resonator and related manufacturing method201910,433,435Semiconductor device, related manufacturing method, and related electronic device201910,199,478Transistor and method for forming the same201910,062,704Buried-channel MOSFET and a surface-channel MOSFET of a same type and fabrication method thereof20189,978,763Semiconductor device, related manufacturing method, and related electronic device20189,953,877Backside processed semiconductor device20189,947,709CMOS image sensor and fabrication method thereof20189,691,667'Integrated circuit and manufacturing method thereof'20179,607,880'Silicon-on-insulator substrate and method of manufacturing thereof'20179,589,884'Integrated circuit device with radio frequency (RF) switches and controller'20179,553,097'Semiconductor device, related manufacturing method, and related electronic device'20179,449,950'Semiconductor device, related manufacturing method, and related electronic device'20169,397,116'Semiconductor device having a closed cavity structure and method of manufacturing the same'20167,749,874'Deep implant self-aligned to polysilicon gate'20107,427,742'Microlens for use with a solid-state image sensor and a non-telecentric taking lens'20087,368,770'Well region with rounded corners'20087,312,484'Pixel having an oxide layer with step region'20077,180,111'Gate n-well/p-substrate photodiode'20077,173,299'Photodiode having extended well region'20076,906,302'Photodetector circuit device and method thereof'20056,777,662'System, circuit and method providing a dynamic range pixel cell with blooming protection'20046,541,794'Imaging device and method'20036,476,426'Electronic component and method for improving pixel charge transfer in the electronic component'20026,221,686'Method of making a semiconductor image sensor'20016,100,556'Method of forming a semiconductor image sensor and structure'20006,023,081'Semiconductor image sensor'20005,312,764'Method of doping a semiconductor substrate'19945,310,711'Method of forming doped shallow electrical junctions'19945,256,162'Apparatus for forming shallow electrical junctions'19935,232,547'Simultaneously measuring thickness and composition of a film'19935,144,403'Bipolar transistor with trench-isolated emitter'19925,008,210'Process of making a bipolar transistor with a trench-isolated emitter'19914,545,823'Grain boundary confinement in silicon-on-insulator films'19854,507,158'Trench isolated transistors in semiconductor films'1985Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1985–1994Patents assigned to HEWLETT PACKARD CO (6)· patent assignee history
1985–1992Based in Mountain View, CA, US· patent location history
1993–2003Patents assigned to MOTOROLA INC (7)· patent assignee history
1993–2001Based in Phoenix, AZ, US· patent location history
2002–2010Based in Scottsdale, AZ, US· patent location history
2007–2008Patents assigned to CYPRESS SEMICONDUCTOR CORP (5)· patent assignee history
2016–2021Patents assigned to SEMICONDUCTOR MFG INT SHANGHAI CORP (16)· patent assignee history
2016–2021Based in Shanghai, CN· patent location history
2019–2021Patents assigned to NINGBO SEMICONDUCTOR INT CORP (13)· patent assignee history
2020–2021Based in Ningbo, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SEMICONDUCTOR MFG INT SHANGHAI CORP | 16 | 2016–2021 |
| NINGBO SEMICONDUCTOR INT CORP | 13 | 2019–2021 |
| MOTOROLA INC | 7 | 1993–2003 |
| HEWLETT PACKARD CO | 6 | 1985–1994 |
| CYPRESS SEMICONDUCTOR CORP | 5 | 2007–2008 |
Locations
| Location | Patents | Span |
|---|---|---|
| Shanghai, CN | 17 | 2016–2021 |
| Scottsdale, AZ, US | 10 | 2002–2010 |
| Ningbo, CN | 7 | 2020–2021 |
| Phoenix, AZ, US | 6 | 1993–2001 |
| Mountain View, California, US | 4 | 1985–1992 |