Inventor

Sunil K. Shukla

Inventor
Dobbs Ferry, NY, US

Overview

16→
Patents
2006–2021
Patent span
Physics
Primary field (CPC G)

Patents· 16 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing46%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use18%
H03HImpedance networks, e.g. resonant circuits11%
G01RMeasuring electric variables7%
F03DWind motors4%
F05BIndexing scheme relating to wind, spring, weight, inertia or like motors, to machines or engines for liquids covered by subclasses f03b, f03d and f03g4%
G06NComputing arrangements based on specific computational models4%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications4%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution4%
PatentTitleYear
11,017,315Forecasting wind turbine curtailment202110,838,868Programmable data delivery by load and store agents on a processing chip interfacing with on-chip memory components and directing data to external memory components202010,528,356Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits202010,216,626Parallel garbage collection implemented in hardware201910,120,685Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits20189,632,928'Parallel garbage collection implemented in hardware'20179,418,187'Cycle-accurate replay and debugging of running FPGA systems'20169,355,030'Parallel garbage collection implemented in hardware'20169,329,843'Communication stack for software-hardware co-execution on heterogeneous computing systems with processors and reconfigurable logic (FPGAs)'20169,323,506'Communication stack for software-hardware co-execution on heterogeneous computing systems with processors and reconfigurable logic (FPGAs)'20169,217,774'Cycle-accurate replay and debugging of running FPGA systems'20158,856,491'Garbage collection implemented in hardware'20148,566,768'Best clock frequency search for FPGA-based design'20137,035,328'Method of slewing a digital filter providing filter sections with matched gain'20067,027,502'Run-time coefficient generation for digital filter with slewing bandwidth'20066,988,116'Method of designing polynomials for controlling the slewing of adaptive digital films'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006Patents assigned to VISTEON GLOBAL TECH INC (2)· patent assignee history
2006Based in Dearborn, MI, US· patent location history
2013–2021Patents assigned to IBM (13)· patent assignee history
2013–2014Patents assigned to CHENG PERRY S (2)· patent assignee history
2013–2014Patents assigned to SHUKLA SUNIL K (2)· patent assignee history
2013–2016Based in Tarrytown, NY, US· patent location history
2014Patents assigned to BACON DAVID F (1)· patent assignee history
2015–2020Based in Dobbs Ferry, NY, US· patent location history
2020Based in Scarsdale, NY, US· patent location history
2021Based in Elmsford, NY, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM132013–2021
CHENG PERRY S22013–2014
SHUKLA SUNIL Kself22013–2014
VISTEON GLOBAL TECH INC22006
BACON DAVID F12014
Locations
LocationPatentsSpan
Dobbs Ferry, New York, US72015–2020
Tarrytown, New York, US32013–2016
Dearborn, MI, US32006
Elmsford, New York, US12021
Scarsdale, New York, US12020