LexDanaLexDanabeta
Inventor

Jose G. Padilla

Inventor
South Gate, CA, US

Overview

2→
Patents
2004–2016
Patent span
Electricity
Primary field (CPC H)

Patents· 2 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices25%
H01PWaveguides25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
PatentTitleYear
9,425,110'Yield enhancing vertical redundancy method for 3D wafer level packaged (WLP) integrated circuit systems'20166,683,510'Ultra-wideband planar coupled spiral balun'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004Patents assigned to NORTHROP GRUMMAN CORP (1)· patent assignee history
2004–2016Based in South Gate, CA, US· patent location history
2016Patents assigned to NORTHROP GRUMMAN SYSTEMS CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NORTHROP GRUMMAN CORP12004
NORTHROP GRUMMAN SYSTEMS CORP12016
Locations
LocationPatentsSpan
South Gate, California, US22004–2016