Inventor
Juergen Faul
Inventor
Radebeul, DE
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices32%
H01LSemiconductor devices22%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%
H10BElectronic memory devices11%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
B81BMicrostructural devices or systems, e.g. micromechanical devices1%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems1%
G01LMeasuring force, stress, torque, work, mechanical power, mechanical efficiency, or fluid pressure1%
PatentTitleYear
10,535,674Method of forming a semiconductor device structure and semiconductor device structure202010,466,126MEMS capacitive pressure sensors in fully depleted semiconductor on insulator (FDSOI)201910,224,342Tunable capacitor for FDSOI applications201910,032,891FinFET based flash memory cell201810,026,753Method for compensating for temperature effects in semiconductor device structures using a diode structure and a tunable resistor20189,917,087'Integrated circuits with a partially-depleted region formed over a bulk silicon substrate and methods for fabricating the same'20189,905,707'MOS capacitive structure of reduced capacitance variability'20189,876,111Method of forming a semiconductor device structure using differing spacer widths and the resulting semiconductor device structure20189,837,439Compensation of temperature effects in semiconductor device structures20179,748,259'Method of forming a semiconductor device structure and semiconductor device structure'20179,748,270'Tunable capacitor for FDSOI applications'20179,666,589'FinFET based flash memory cell'20179,299,616'Integrated circuits with separate workfunction material layers and methods for fabricating the same'20169,177,803'HK/MG process flows for P-type semiconductor devices'20159,093,526'Methods of forming a sidewall spacer having a generally triangular shape and a semiconductor device having such a spacer'20159,064,733'Contact structure for a semiconductor device and methods of making same'20159,023,715'Methods of forming bulk FinFET devices so as to reduce punch through leakage currents'20158,962,414'Reduced spacer thickness in semiconductor device fabrication'20158,956,928'Contact structure for a semiconductor device and methods of making same'20158,951,920'Contact landing pads for a semiconductor device and methods of making same'20158,823,149'Contact landing pads for a semiconductor device and methods of making same'20148,614,134'Shallow source and drain architecture in an active region of a semiconductor device having a pronounced surface topography by tilted implantation'20137,915,713'Field effect transistors with channels oriented to different crystal planes'20117,700,983'Transistor, memory cell, memory cell array and method of forming a memory cell array'20106,022,796'Geometrical control of device corner threshold'20005,998,852'Geometrical control of device corner threshold'19995,858,866'Geometrical control of device corner threshold'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2000Patents assigned to IBM (3)· patent assignee history
1999–2000Patents assigned to SIEMENS AG (2)· patent assignee history
1999–2000Based in Wappingers Falls, NY, US· patent location history
2010–2011Patents assigned to QIMONDA AG (2)· patent assignee history
2010–2020Based in Radebeul, DE· patent location history
2013–2020Patents assigned to GLOBALFOUNDRIES INC (22)· patent assignee history
2013–2015Patents assigned to FAUL JUERGEN (2)· patent assignee history
2013–2019Based in Dresden, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 22 | 2013–2020 |
| IBM | 3 | 1999–2000 |
| FAUL JUERGENself | 2 | 2013–2015 |
| QIMONDA AG | 2 | 2010–2011 |
| SIEMENS AG | 2 | 1999–2000 |
Locations
| Location | Patents | Span |
|---|---|---|
| Radebeul, DE | 20 | 2010–2020 |
| Dresden, DE | 4 | 2013–2019 |
| Wappingers Falls, New York, US | 3 | 1999–2000 |