Inventor

Pradeep Kanapathipillai

Inventor
Santa Clara, CA, US

Overview

21→
Patents
2012–2021
Patent span
Physics
Primary field (CPC G)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing75%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use18%
A61BDiagnosis4%
A61NElectrotherapy4%
PatentTitleYear
10,990,159Architected state retention for a frequent operating state switching processor202110,725,928Translation lookaside buffer invalidation by range202010,621,100Unified prefetch circuit for multi-level caches202010,437,595Load/store dependency predictor optimization for replayed loads201910,228,951Out of order store commit201910,180,905Unified prefetch circuit for multi-level caches201910,133,571Load-store unit with banked queue201810,037,073Execution unit power management20189,852,084Access permissions modification20179,710,268'Reducing latency for pointer chasing loads'20179,535,695'Completing load and store instructions in a weakly-ordered memory model'20179,501,284'Mechanism for allowing speculative execution of loads beyond a wait for event instruction'20169,494,997'Hierarchical clock control using hysterisis and threshold management'20169,383,995'Load ordering in a weakly-ordered processor'20169,229,866'Delaying cache data array updates'20169,131,899'Efficient handling of misaligned loads and stores'20159,098,418'Coordinated prefetching based on training in hierarchically cached processors'20159,047,198'Prefetching across page boundaries in hierarchically cached processors'20159,043,554'Cache policies for uncacheable memory requests'20158,364,936'Processor employing split scheduler in which near, low latency operation dependencies are tracked separate from other operation dependencies'20138,255,671'Processor employing split scheduler in which near, low latency operation dependencies are tracked separate from other operation dependencies'2012

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2012–2021Patents assigned to APPLE INC (21)· patent assignee history
2012–2015Patents assigned to KANAPATHIPILLAI PRADEEP (4)· patent assignee history
2012–2013Patents assigned to BANNON PETER J (2)· patent assignee history
2012–2013Patents assigned to BEAUMONT-SMITH ANDREW J (2)· patent assignee history
2012–2021Based in Santa Clara, CA, US· patent location history
2015Patents assigned to KANNAN HARI S (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
APPLE INC212012–2021
KANAPATHIPILLAI PRADEEPself42012–2015
BANNON PETER J22012–2013
BEAUMONT-SMITH ANDREW J22012–2013
KANNAN HARI S22015
Locations
LocationPatentsSpan
Santa Clara, California, US212012–2021