Inventor

Changhyun Lee

Inventor

Suwon-si, KR

Overview

2011–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 66 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Bprimary

H10BElectronic memory devices24%

H10DInorganic electric semiconductor devices23%

H01LSemiconductor devices19%

G11CStatic stores16%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%

F16HGearing2%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%

Y10TTechnical subjects covered by former us classification2%

B60KArrangement or mounting of propulsion units or of transmissions in vehicles1%

B60TVehicle brake control systems or parts thereof1%

PatentTitleYear

10,839,896Programming multiple-level memory cells with multiple-pass2020 10,818,357Memory device including multiple select gates and different bias conditions2020 10,748,929Three-dimensional semiconductor devices2020 10,600,801Three-dimensional semiconductor memory devices2020 10,586,808Semiconductor device including a stack having a sidewall with recessed and protruding portions2020 10,559,590Three-dimensional semiconductor devices2020 10,517,160Method and apparatus for controlling lighting2019 10,483,278Nonvolatile memory devices and methods forming the same2019 10,411,031Semiconductor device including a stack having a sidewall with recessed and protruding portions2019 10,360,979Memory device including multiple select gates and different bias conditions2019 10,300,241Method and apparatus for controlling temperature adjustment device2019 10,176,880Selective body reset operation for three dimensional (3D) NAND memory2019 10,096,616Three-dimensional semiconductor device with vertical and horizontal channels in stack structure having electrodes vertically stacked on the substrate2018 10,038,007Three-dimensional semiconductor devices2018 10,026,480Memory device including multiple select gates and different bias conditions2018 9,966,451Integrated structures2018 9,947,686Semiconductor device including a stack having a sidewall with recessed and protruding portions2018 9,905,574'Three-dimensional semiconductor memory devices'2018 9,905,575'Integrated structures comprising charge-storage regions along outer portions of vertically-extending channel material'2018 9,847,346Three-dimensional semiconductor memory device2017 9,793,292'Three-dimensional semiconductor memory devices'2017 9,773,882'Integrated structures'2017 9,754,957'Nonvolatile memory devices and methods forming the same'2017 9,748,265'Integrated structures comprising charge-storage regions along outer portions of vertically-extending channel material'2017 9,728,266'Memory device including multiple select gates and different bias conditions'2017 9,685,452'Three-dimensional semiconductor device with vertical and horizontal channels in stack structure having electrodes vertically stacked on the substrate'2017 9,627,396'Semiconductor device including a stack having a sidewall with recessed and protruding portions'2017 9,601,208'Nonvolatile memory device and driving method thereof'2017 9,595,346'3-Dimensional semiconductor memory device and operating method thereof'2017 9,564,237'Nonvolatile memory device and read method thereof'2017 9,536,895'Methods of fabricating three-dimensional semiconductor devices'2017 9,356,159'Three-dimensional semiconductor memory devices'2016 9,343,154'Nonvolatile memory device and driving method thereof'2016 9,240,419'Three-dimensional semiconductor devices and methods of fabricating the same'2016 9,236,340'String selection structure of three-dimensional semiconductor device'2016 9,224,485'Nonvolatile memory device and method of programming the same minimizing disturbance from adjacent cells'2015 9,224,493'Nonvolatile memory device and read method thereof'2015 9,177,965'Nonvolatile memory device in three-dimensional structure with a stress reducing materials on the channel'2015 9,147,471'Nonvolatile memory device and driving method thereof'2015 9,136,395'Three-dimensional semiconductor memory devices'2015 9,093,479'Method of forming nonvolatile memory device'2015 9,047,952'Nonvolatile memory devices and methods forming the same'2015 9,000,508'Nonvolatile memory devices having vertically integrated nonvolatile memory cell sub-strings therein'2015 8,981,458'Three-dimensional semiconductor devices and methods of fabricating the same'2015 8,929,145'Nonvolatile memory device, programming method thereof and memory system including the same'2015 8,919,218'Transmission system for shift by wire'2014 8,891,315'Nonvolatile memory device and erase method thereof'2014 8,872,183'Three-dimensional semiconductor devices'2014 8,839,916'Control method for parking release apparatus of shift-by-wire shifting device'2014 8,829,589'Three-dimensional semiconductor memory device'2014 8,737,129'Nonvolatile memory device and read method thereof'2014 8,653,578'Semiconductor device comprising string structures formed on active region'2014 8,643,080'Three-dimensional semiconductor memory device'2014 8,644,064'Memory semiconductor device and method of operating the same'2014 8,625,348'Nonvolatile memory devices and methods forming the same'2014 8,581,321'Nonvolatile memory device and method of forming the same'2013 8,569,827'Three-dimensional semiconductor memory devices'2013 8,570,805'Nonvolatile memory device, programming method thereof and memory system including the same'2013 8,546,869'Nonvolatile memory devices having vertically integrated nonvolatile memory cell sub-strings therein'2013 8,446,773'Memory system and programming method thereof'2013 8,434,383'Transmission shifting apparatus for vehicle'2013 8,408,088'Apparatus for removing parking state of shift-by-wire shifting device'2013 8,278,170'Methods of forming nonvolatile memory devices having vertically integrated nonvolatile memory cell sub-strings therein'2012 8,107,295'Nonvolatile memory device and read method thereof'2012 8,064,259'Nonvolatile NAND-type memory devices including charge storage layers connected to insulating layers'2011 8,059,466'Memory system and programming method thereof'2011

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2020Patents assigned to SAMSUNG ELECTRONICS CO LTD (52)· patent assignee history

2011–2018Patents assigned to LEE CHANGHYUN (31)· patent assignee history

2011–2017Patents assigned to CHOI JUNGDAL (7)· patent assignee history

2011–2020Based in Suwon-si, KR· patent location history

2011–2015Based in Gyeonggi-do, KR· patent location history

2013–2018Patents assigned to SON BYOUNGKEUN (12)· patent assignee history

2013–2014Based in Seoul, KR· patent location history

2013–2015Based in Hwasung, KR· patent location history

2017–2020Patents assigned to MICRON TECHNOLOGY INC (9)· patent assignee history

2017–2020Based in Boise, ID, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
SAMSUNG ELECTRONICS CO LTD	52	2011–2020
LEE CHANGHYUNself	31	2011–2018
SON BYOUNGKEUN	12	2013–2018
MICRON TECHNOLOGY INC	9	2017–2020
CHOI JUNGDAL	7	2011–2017

Locations

Location	Patents	Span
Suwon-si, KR	47	2011–2020
Boise, ID, US	10	2017–2020
Seoul, KR	4	2013–2014
Gyeonggi-do, KR	3	2011–2015
Hwasung, KR	2	2013–2015