Inventor
Tzu-Yen Hsieh
Inventor
Taipei, TW
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1028%
H01LSemiconductor devices26%
H10DInorganic electric semiconductor devices25%
H01JElectric discharge tubes or discharge lamps4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
C23CCoating metallic material2%
G01GWeighing2%
G07BTicket-issuing apparatus2%
G07FCoin-freed or like apparatus2%
H05HPlasma technique2%
PatentTitleYear
10,854,433In-situ real-time plasma chamber condition monitoring202010,665,457Method of forming an integrated circuit using a patterned mask layer202010,269,581Method of fabricating a semiconductor structure20199,934,971Method of forming an integrated circuit using a patterned mask layer20189,923,079'Composite dummy gate with conformal polysilicon layer for FinFET device'20189,779,963'Method of fabricating a semiconductor structure'20179,640,398'Method of forming an integrated circuit using a patterned mask layer'20179,287,179'Composite dummy gate with conformal polysilicon layer for FinFET device'20169,276,089'FinFETs and methods for forming the same'20169,147,679'Method of semiconductor integrated circuit fabrication'20159,123,743'FinFETs and methods for forming the same'20159,111,861'Method of fabricating a semiconductor structure with ion-implanted conductive layer'20159,059,085'Method of forming an integrated circuit using a patterned mask layer'20159,054,125'Method for making semiconductor device with gate profile control'20158,853,092'Self-aligned patterning with implantation'20148,772,183'Method of forming an integrated circuit'20148,691,655'Method of semiconductor integrated circuit fabrication'20148,680,671'Self-aligned double patterning for memory and other microelectronic devices'20147,279,429'Method to improve ignition in plasma etching or plasma deposition steps'20076,790,753'Field plated schottky diode and method of fabrication therefor'20046,690,037'Field plated Schottky diode'20044,923,022'Automatic mailing apparatus'1990Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1990–2020Based in Taipei, TW· patent location history
2004Based in Wyomissing, PA, US· patent location history
2007–2014Based in Saratoga, CA, US· patent location history
2014–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (9)· patent assignee history
2014–2016Patents assigned to HSIEH TZU-YEN (6)· patent assignee history
2014–2016Patents assigned to CHEN CHAO-CHENG (4)· patent assignee history
2014–2016Patents assigned to CHANG MING-CHING (3)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (7)· patent assignee history
2020Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 9 | 2014–2016 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 7 | 2015–2020 |
| HSIEH TZU-YENself | 6 | 2014–2016 |
| CHEN CHAO-CHENG | 4 | 2014–2016 |
| CHANG MING-CHING | 3 | 2014–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Taipei, TW | 17 | 1990–2020 |
| Saratoga, California, US | 2 | 2007–2014 |
| Wyomissing, Pennsylvania, US | 2 | 2004 |
| Hsinchu, TW | 1 | 2020 |