Inventor

Spiros Kalogeropulos

Inventor
Los Gatos, CA, US

Overview

33→
Patents
2005–2016
Patent span
Physics
Primary field (CPC G)

Patents· 33 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
9,465,618'Methods and systems for optimally selecting an assist unit'20169,430,201'Compiling multi-threaded applications for targeted criticalities'20169,274,770'Fault tolerant compilation with automatic error correction'20169,274,771'Automated adaptive compiler optimization'20169,207,921'Fault tolerant compilation with automatic optimization adjustment'20159,032,379'Platform specific optimizations in static compilers'20159,009,692'Minimizing register spills by using register moves'20158,978,022'Reducing instruction miss penalties in applications'20158,850,413'Compiling multi-threaded applications for targeted criticalities'20148,752,036'Throughput-aware software pipelining for highly multi-threaded systems'20148,739,141'Parallelizing non-countable loops with hardware transactional memory'20148,726,251'Pipelined loop parallelization with pre-computations'20148,677,337'Static profitability control for speculative automatic parallelization'20148,612,929'Compiler implementation of lock/unlock using hardware transactional memory'20138,595,744'Anticipatory helper thread based code execution'20138,561,046'Pipelined parallelization with localized self-helper threading'20138,528,001'Controlling and dynamically varying automatic parallelization'20138,479,185'Method and system for utilizing parallelism across loops'20138,359,587'Runtime profitability control for speculative automatic parallelization'20138,312,442'Method and system for interprocedural prefetching'20128,239,843'Value predictable variable scoping for speculative automatic parallelization with transactional memory'20128,166,486'Adjusting workload to accommodate speculative thread start-up cost'20128,151,252'Compiler framework for speculative automatic parallelization with transactional memory'20128,069,440'Adaptive code through self steered execution'20117,950,012'Facilitating communication and synchronization between main and scout threads'20117,849,453'Method and apparatus for software scouting regions of a program'20107,681,188'Locked prefetch scheduling in general cyclic regions'20107,458,067'Method and apparatus for optimizing computer program performance using steered execution'20087,383,401'Method and system for identifying multi-block indirect memory access chains'20087,383,402'Method and system for generating prefetch information for multi-block indirect memory access chains'20087,257,810'Method and apparatus for inserting prefetch instructions in an optimizing compiler'20077,234,136'Method and apparatus for selecting references for prefetching in an optimizing compiler'20076,948,162'Enhanced parallelism in trace scheduling by using renaming'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2016Based in Los Gatos, CA, US· patent location history
2010–2016Patents assigned to ORACLE AMERICA INC (17)· patent assignee history
2011–2016Patents assigned to KALOGEROPULOS SPIROS (19)· patent assignee history
2011–2016Patents assigned to SONG YONGHONG (15)· patent assignee history
2011–2016Patents assigned to TIRUMALAI PARTHA P (15)· patent assignee history
2013–2016Patents assigned to ORACLE INT CORP (9)· patent assignee history
2016Based in Redwood City, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
KALOGEROPULOS SPIROSself192011–2016
ORACLE AMERICA INC172010–2016
SONG YONGHONG152011–2016
TIRUMALAI PARTHA P152011–2016
ORACLE INT CORP92013–2016
Locations
LocationPatentsSpan
Los Gatos, California, US322005–2016
Redwood City, California, US12016