Inventor

YIH WANG

Inventor

TW

Overview

2021–2026

Patent span

Electricity

Primary field (CPC H)

Patents· 197 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores25%

H10BElectronic memory devices19%

H01LSemiconductor devices16%

H10DInorganic electric semiconductor devices13%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%

G06FElectric digital data processing5%

H10NElectric solid-state devices not otherwise provided for3%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%

H03KPulse technique1%

B82YSpecific uses or applications of nanostructures1%

PatentTitleYear

12,597,466Semiconductor memory devices with differential threshold voltages2026 12,591,429Memory interface2026 12,586,619Integrated circuit device and methods2026 12,575,107Memory device2026 12,563,721Memory device and method for forming the same2026 12,562,216Circuit with swept voltage on bit line or bit line bar2026 12,541,319Computing-in-memory device and method2026 12,538,851Memory packages and methods of forming same2026 12,518,841One-time-programmable memory2026 12,520,4704CPP SRAM cell and array2026 12,517,679Memory interface2026 12,489,051One-time-programmable memory device including an antifuse structure and methods of forming the same2025 12,482,531Dynamic error monitor and repair2025 12,464,811Memory devices and methods of manufacturing thereof2025 12,463,151PUF memory devices and methods of manufacturing thereof2025 12,424,257Memory devices with dual-side access circuits and methods for operating the same2025 12,423,494Memory device with improved anti-fuse read current2025 12,406,923One-time-programmable memory device including an antifuse structure and methods of forming the same2025 12,406,702Switches to reduce routing rails of memory system2025 12,402,376High-voltage nano-sheet transistor2025 12,394,469DRAM computation circuit and method2025 12,388,065Memory circuits2025 12,389,806MRAM cell and MRAM2025 12,380,950Non-volatile static random access memory (NVSRAM) with multiple magnetic tunnel junction cells2025 12,382,714Memory devices and methods of manufacturing thereof2025 12,374,396Memory including metal rails with balanced loading2025 12,361,981Using embedded switches for reducing capacitive loading on a memory system2025 12,355,026Method of writing to or erasing multi-bit memory storage device2025 12,347,505Memory device and operating method of the same2025 12,349,423Memory devices and methods of manufacturing thereof2025 12,322,435Sense amplifier with read circuit for compute-in-memory2025 12,322,432Method and system for refresh of memory devices2025 12,293,799Memory circuit and method of operating same2025 12,288,577Sensing amplifier, method and controller for sensing memory cell2025 12,283,336System for differentiated thermal throttling of memory and method of operating same2025 12,284,804Memory devices, semiconductor devices, and methods of operations a memory device2025 12,272,420Series of parallel sensing operations for multi-level cells2025 12,266,424Memory circuit and method of operating same2025 12,260,904Memory device with additional write bit lines2025 12,260,928Memory devices with backside boost capacitor and methods for forming the same2025 12,260,897Separated read BL scheme in 3T dram for read speed improvement2025 12,261,152Vertical interconnect structures in three-dimensional integrated circuits2025 12,254,923Nonvolatile SRAM2025 12,249,390Memory systems with vertical integration2025 12,243,589Memory device and method for operating the same2025 12,243,618Method of manufacturing semiconductor device2025 12,230,338Semiconductor memory devices with diode-connected MOS2025 12,230,359Semiconductor device2025 12,217,822Memory device with source line control2025 12,217,790Memory array connections2025 12,217,782Current steering in reading magnetic tunnel junction2025 12,218,047Memory devices and methods of manufacturing thereof2025 12,210,368Bias generating devices and methods for generating bias2025 12,211,568Multi-fuse memory cell circuit and method2025 12,205,648Three-dimensional one time programmable memory2025 12,191,395Dual gate control for trench shaped thin film transistors2025 12,193,223Memory device with improved anti-fuse read current2025 12,193,204Memory devices and methods of manufacturing thereof2025 12,190,986Sense amplifier for coupling effect reduction2025 12,190,931Semiconductor memory devices and methods of manufacturing thereof2025 12,183,397Memory circuits and devices, and methods thereof2024 12,176,284Through plate interconnect for a vertical MIM capacitor2024 12,176,049MIM eFuse memory devices and fabrication method thereof2024 12,165,704Memory device with write pulse trimming2024 12,137,570Three dimensional memory device2024 12,137,571Integrated circuit including three-dimensional memory device2024 12,114,506Semiconductor structure and method of fabricating the same2024 12,112,163Memory interface2024 12,100,705Deep trench via for three-dimensional integrated circuit2024 12,094,558Multiple stack high voltage circuit for memory2024 12,087,345Balanced negative bitline voltage for a write assist circuit2024 12,087,354Memory device2024 12,089,414Memory device and method of forming the same2024 12,089,402Integrated circuit layout and method2024 12,080,643Integrated circuit structures having differentiated interconnect lines in a same dielectric layer2024 12,075,614MIM memory cell with backside interconnect structures2024 12,068,284Vertical interconnect structures with integrated circuits2024 12,063,786Compute-in-memory device and method2024 12,063,773Layout structure including anti-fuse cell2024 12,062,408Switches to reduce routing rails of memory system2024 12,052,859Non-volatile memory device with reduced area2024 12,048,147Layout structure including anti-fuse cell2024 12,027,220One-time-programmable memory2024 12,026,404Memory device for scheduling maximum number of memory macros write operations at re-arranged time intervals2024 12,027,204Memory including metal rails with balanced loading2024 12,014,768DRAM computation circuit and method2024 12,010,833Method and structure for reduce OTP cell area and leakage2024 12,002,528Memory device and operating method of the same2024 12,002,534Memory array word line routing2024 11,997,847Thin film transistors with spacer controlled gate length2024 11,997,8434CPP SRAM cell and array2024 11,984,164Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells2024 11,978,723Vertical interconnect structures in three-dimensional integrated circuits2024 11,978,509Semiconductor memory devices with differential threshold voltages2024 11,978,804Recessed thin-channel thin-film transistor2024 11,963,463MRAM cell and MRAM2024 11,953,927Bias generating devices and methods for generating bias2024 11,955,201Memory device2024 11,955,191Semiconductor memory devices with diode-connected MOS2024 11,948,972High-voltage nano-sheet transistor2024 11,942,155Semiconductor memory devices with dielectric fin structures2024 11,942,177Using embedded switches for reducing capacitive loading on a memory system2024 11,935,610Dynamic error monitor and repair2024 11,915,787Integrated circuit device and methods2024 11,901,035Method of differentiated thermal throttling of memory and system therefor2024 11,903,188Memory devices, semiconductor devices, and methods of operating a memory device2024 11,869,971Multi-bit memory storage device2024 11,862,729Vertical multi-gate thin film transistors2024 11,862,728Dual gate control for trench shaped thin film transistors2024 11,854,663Memory circuit and method of operating same2023 11,855,046Memory packages and methods of forming same2023 11,856,786Integrated circuit including three-dimensional memory device2023 11,854,616Memory including metal rails with balanced loading2023 11,856,762Memory devices and methods of manufacturing thereof2023 11,849,574Layout structure of storage cell and manufacturing method thereof2023 11,848,381Methods of operating multi-bit memory storage device2023 11,842,781Layout structures of memory array and related methods2023 11,843,054Vertical architecture of thin film transistors2023 11,837,300Multi-fuse memory cell circuit and method2023 11,823,769Reducing capacitive loading of memory system based on switches2023 11,810,611Method and system for refresh of memory devices2023 11,810,635Sense amplifier for coupling effect reduction2023 11,791,005Memory circuit and method of operating same2023 11,776,595Memory device with source line control2023 11,770,934Semiconductor structure and method of fabricating the same2023 11,756,591Switches to reduce routing rails of memory system2023 11,758,711Thin-film transistor embedded dynamic random-access memory with shallow bitline2023 11,758,715System and method for reducing cell area and current leakage in anti-fuse cell array2023 11,756,640MIM efuse memory devices and fabrication method thereof2023 11,749,664Memory circuits2023 11,742,021Memory device with write pulse trimming2023 11,735,235Series of parallel sensing operations for multi-level cells2023 11,735,280Memory device and operating method of the same2023 11,735,259Read method, write method and memory circuit using the same2023 11,723,188Replacement metal COB integration process for embedded DRAM2023 11,714,570Computing-in-memory device and method2023 11,705,177Semiconductor memory devices and methods of manufacturing thereof2023 11,696,437Integrated circuit device2023 11,690,215Self-aligned bitline and capacitor via formation2023 11,688,481Semiconductor memory devices with diode-connected MOS2023 11,681,468Memory device for scheduling maximum number of memory macros write operations at re-arranged time intervals2023 11,682,433Multiple stack high voltage circuit for memory2023 11,676,641Memory systems with vertical integration2023 11,676,648Current steering in reading magnetic tunnel junction2023 11,657,873Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells2023 11,653,4874F2 DRAM cell using vertical thin film transistor2023 11,653,492Memory devices and methods of manufacturing thereof2023 11,631,440Sensing amplifier, method and controller for sensing memory cell2023 11,605,639One-time-programmable memory device including an antifuse structure and methods of forming the same2023 11,605,427Memory device with write pulse trimming2023 11,600,626Semiconductor device including anti-fuse cell2023 11,601,117Sense amplifier for coupling effect reduction2023 11,563,014Memory devices and methods of manufacturing thereof2023 11,563,015Memory devices and methods of manufacturing thereof2023 11,545,218Nonvolatile SRAM2023 11,532,746Multi-bit memory storage device and method of operating same2022 11,532,752Non-volatile memory device with reduced area2022 11,532,351Memory device with additional write bit lines2022 11,521,663Memory circuit and method of operating same2022 11,482,276System and method for read speed improvement in 3T DRAM2022 11,469,268Damascene-based approaches for embedding spin hall MTJ devices into a logic processor and the resulting structures2022 11,450,362Memory device, integrated circuit device and method2022 11,437,386System and method for reducing cell area and current leakage in anti-fuse cell array2022 11,423,960Memory device2022 11,424,233Memory circuits and related methods2022 11,410,740Multi-fuse memory cell circuit and method2022 11,404,091Memory array word line routing2022 11,404,536Thin-film transistor structures with gas spacer2022 11,393,873Approaches for embedding spin hall MTJ devices into a logic processor and the resulting structures2022 11,386,936Memory device, sensing amplifier, and method for sensing memory cell2022 11,380,415Dynamic error monitor and repair2022 11,373,999Deep trench via for three-dimensional integrated circuit2022 11,367,482Read method, write method and memory circuit using the same2022 11,342,341Integrated circuit layout, method, structure, and system2022 11,329,047Thin-film transistor embedded dynamic random-access memory with shallow bitline2022 11,322,680MRAM cell, MRAM and IC with MRAM2022 11,322,504Ferroelectric-capacitor integration using novel multi-metal-level interconnect with replaced dielectric for ultra-dense embedded SRAM in state-of-the-art CMOS technology2022 11,315,936Memory device and manufacturing method thereof2022 11,309,005Current steering in reading magnetic tunnel junction2022 11,309,011Method and system for refresh of memory devices2022 11,296,229Vertical thin film transistors having self-aligned contacts2022 11,296,087Thin film transistors with spacer controlled gate length2022 11,282,816Memory packages and methods of forming same2022 11,270,998Embedded memory in three-dimensional integrated circuit2022 11,257,827Layout structure including anti-fuse cell2022 11,250,923Layout structures of memory array2022 11,245,038Vertical multi-gate thin film transistors2022 11,238,904Using embedded switches for reducing capacitive loading on a memory system2022 11,237,834Memory device, access controller thereof and method for accessing memory device2022 11,238,906Series of parallel sensing operations for multi-level cells2022 11,233,040Integration of high density cross-point memory and CMOS logic for high density low latency eNVM and eDRAM applications2022 11,222,895Embedded memory employing self-aligned top-gated thin film transistors2022 11,200,924Method of minimizing read-disturb-write effect of SRAM circuit and SRAM circuit thereof2021 11,195,567Balanced negative bitline voltage for a write assist circuit2021 11,189,356One-time-programmable memory2021 11,183,261Test device for memory, method for detecting hardware failure in memory device, and test apparatus of memory array2021 11,183,594Dual gate control for trench shaped thin film transistors2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (170)· patent assignee history

2021–2025Patents assigned to INTEL CORP (26)· patent assignee history

2021–2026Based in TW· patent location history

2021–2025Based in US· patent location history

2023Patents assigned to TAIWAN SEMICONDUCTOR MFG LIMITED (1)· patent assignee history

2026Patents assigned to TAIWAN SEMICONDUCTOR MFG COMPANY LTD (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	170	2021–2026
INTEL CORP	26	2021–2025
TAIWAN SEMICONDUCTOR MFG COMPANY LTD	1	2026
TAIWAN SEMICONDUCTOR MFG LIMITED	1	2023

Locations

Location	Patents	Span
TW	171	2021–2026
US	26	2021–2025