Inventor

Carlo Cremonesi

Inventor
Vaprio d'Adda, IT

Overview

16→
Patents
1999–2011
Patent span
Electricity
Primary field (CPC H)

Patents· 16 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Bprimary
H10BElectronic memory devices65%
H10DInorganic electric semiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
PatentTitleYear
7,910,444'Process for forming differential spaces in electronics device integrated on a semiconductor substrate'20117,419,876'Method for manufacturing non-volatile memory devices integrated in a semiconductor substrate'20086,437,395'Process for the manufacturing of an electrically programmable non-volatile memory device'20026,432,762'Memory cell for EEPROM devices, and corresponding fabricating process'20026,329,254'Memory cell of the EEPROM type having its threshold adjusted by implantation, and fabrication method'20016,320,219'Memory cell for EEPROM devices and corresponding fabricating process'20016,313,480'Structure and method for evaluating an integrated electronic device'20016,274,411'Method for manufacturing electronic devices, comprising non-salicided non-volatile memory cells, non-salicided HV transistors, and LV transistors with salicided junctions with few masks'20016,268,247'Memory cell of the EEPROM type having its threshold set by implantation, and fabrication method'20016,255,163'Process for manufacturing selection transistors for nonvolatile serial-flash, EPROM, EEPROM and flash-EEPROM memories in standard or AMG configuration'20016,221,717'EEPROM memory cell comprising a selection transistor with threshold voltage adjusted by implantation, and related manufacturing process'20016,194,270'Process for the manufacturing of an electrically programmable non-volatile memory device'20016,180,460'Process for manufacturing of a non volatile memory with reduced resistance of the common source lines'20016,097,057'Memory cell for EEPROM devices, and corresponding fabricating process'20006,080,626'Memory cell for EEPROM devices, and corresponding fabricating process'20005,985,718'Process for fabricating memory cells with two levels of polysilicon for devices of EEPROM type'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2002Patents assigned to SGS THOMSON MICROELECTRONICS (5)· patent assignee history
1999–2011Based in Vaprio d'Adda, IT· patent location history
2001–2011Patents assigned to ST MICROELECTRONICS SRL (11)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ST MICROELECTRONICS SRL112001–2011
SGS THOMSON MICROELECTRONICS51999–2002
Locations
LocationPatentsSpan
Vaprio d'Adda, IT161999–2011