Inventor

Sanjiv Sambandan

Inventor
Palo Alto, CA, US

Overview

21→
Patents
2010–2014
Patent span
Electricity
Primary field (CPC H)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

B82Yprimary
B82YSpecific uses or applications of nanostructures17%
H10DInorganic electric semiconductor devices13%
G11CStatic stores11%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation9%
H10KOrganic electric solid-state devices9%
B05DProcesses for applying fluent materials to surfaces, in general7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H04NPictorial communication, e.g. television4%
G01DMeasuring not specially adapted for a specific variable2%
PatentTitleYear
8,766,367'Textured gate for high current thin film transistors'20148,430,705'Self assembly of field emission tips by capillary bridge formations'20138,411,075'Large area electronic sheet and pixel circuits with disordered semiconductors for sensor actuator interface'20138,314,783'Method and system for calibrating a light emitting device display'20128,300,125'Method and apparatus for using thin-film transistors and MIS capacitors as light-sensing elements in charge mapping arrays'20128,288,799'Thin film field effect transistor with dual semiconductor layers'20128,268,725'Horizontal coffee-stain method using control structure to pattern self-organized line structures'20128,198,127'Charge mapping memory array formed of materials with mutable electrical characteristics'20128,193,601'Structure and method for flexible sensor array'20128,164,122'Thin film field effect transistor with dual semiconductor layers'20128,158,465'Vertical coffee-stain method for forming self-organized line structures'20128,158,973'Organic memory array with ferroelectric field-effect transistor pixels'20128,053,818'Thin film field effect transistor with dual semiconductor layers'20118,047,049'Conformal sensor tape'20118,040,722'Charge mapping memory array formed of materials with mutable electrical characteristics'20118,040,729'Charge mapping memory array formed of materials with mutable electrical characteristics'20118,000,613'Flexible nanowire sensors and field-effect devices for testing toner'20117,867,916'Horizontal coffee-stain method using control structure to pattern self-organized line structures'20117,824,949'Structure and method for flexible sensor array'20107,742,090'Flexible segmented image sensor'20107,679,951'Charge mapping memory array formed of materials with mutable electrical characteristics'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2010–2014Patents assigned to PALO ALTO RES CT INC (20)· patent assignee history
2010–2013Based in Palo Alto, CA, US· patent location history
2011–2012Based in Sunnyvale, CA, US· patent location history
2012–2014Patents assigned to SAMBANDAN SANJIV (12)· patent assignee history
2012–2014Patents assigned to STREET ROBERT A (7)· patent assignee history
2012Patents assigned to ARIAS ANA CLAUDIA (4)· patent assignee history
2012–2013Patents assigned to WONG WILLIAM S (4)· patent assignee history
2012Based in Waterloo, CA· patent location history
2013–2014Based in Bangalore, IN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
PALO ALTO RES CT INC202010–2014
SAMBANDAN SANJIVself122012–2014
STREET ROBERT A72012–2014
ARIAS ANA CLAUDIA42012
WONG WILLIAM S42012–2013
Locations
LocationPatentsSpan
Palo Alto, California, US132010–2013
Sunnyvale, California, US52011–2012
Bangalore, IN22013–2014
Waterloo, CA12012