Inventor

Alexander J. Yerman

Inventor
Scotia, NY, US

Overview

28→
Patents
1977–1996
Patent span
Electricity
Primary field (CPC H)

Patents· 28 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1027%
H01FMagnets17%
Y10TTechnical subjects covered by former us classification12%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
H05KPrinted circuits7%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
H10DInorganic electric semiconductor devices3%
B23KSoldering or unsoldering2%
B26FPerforating2%
PatentTitleYear
5,570,074'Very low leakage inductance, single-laminate transformer'19965,414,401'High-frequency, low-profile inductor'19955,291,173'Z-foldable secondary winding for a low-profile, multi-pole transformer'19945,206,621'Barrel-wound conductive film transformer'19935,179,512'Gate drive for synchronous rectifiers in resonant converters'19935,134,770'Method of fabricating a high-frequency transformer'19925,126,715'Low-profile multi-pole conductive film transformer'19925,084,958'Method of making conductive film magnetic components'19925,043,859'Half bridge device package, packaged devices and circuits'19915,017,902'Conductive film magnetic components'19914,959,630'High-frequency transformer'19904,905,075'Hermetic semiconductor enclosure'19904,829,014'Screenable power chip mosaics, a method for fabricating large power semiconductor chips'19894,824,716'Impermeable encapsulation system for integrated circuits'19894,816,422'Fabrication of large power semiconductor composite by wafer interconnection of individual devices'19894,809,135'Chip carrier and method of fabrication'19894,764,485'Method for producing via holes in polymer dielectrics'19884,716,124'Tape automated manufacture of power semiconductor devices'19874,646,129'Hermetic power chip packages'19874,635,092'Tape automated manufacture of power semiconductor devices'19874,538,170'Power chip package'19854,500,029'Electrical assembly including a conductor pattern bonded to a non-metallic substrate and method of fabricating such assembly'19854,341,594'Method of restoring semiconductor device performance'19824,331,970'Use of dispersed solids as fillers in polymeric materials to provide material for semiconductor junction passivation'19824,236,404'Device for monitoring dissolved gases in electrical insulating liquids such as transformer oils'19804,198,444'Method for providing substantially hermetic sealing means for electronic components'19804,040,874'Semiconductor element having a polymeric protective coating and glass coating overlay'19774,017,340'Semiconductor element having a polymeric protective coating and glass coating overlay'1977

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1977–1996Patents assigned to GEN ELECTRIC (27)· patent assignee history
1977–1996Based in Scotia, NY, US· patent location history
1995Patents assigned to MARTIN MARIETTA CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
GEN ELECTRIC271977–1996
MARTIN MARIETTA CORP11995
Locations
LocationPatentsSpan
Scotia, New York, US281977–1996