Inventor
Andrew P. Edwards
Inventor
San Jose, CA, US
Overview
Patents· 49 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices40%
H01LSemiconductor devices30%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1026%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
9,679,762'Access conductivity enhanced high electron mobility transistor'20179,508,838'InGaN ohmic source contacts for vertical power devices'20169,484,470'Method of fabricating a GaN P-i-N diode using implantation'20169,472,684'Lateral GaN JFET with vertical drift region'20169,450,112'GaN-based Schottky barrier diode with algan surface layer'20169,397,186'Method of fabricating a gallium nitride merged P-I-N schottky (MPS) diode by regrowth and etch back'20169,330,918'Edge termination by ion implantation in gallium nitride'20169,324,844'Method and system for a GaN vertical JFET utilizing a regrown channel'20169,318,331'Method and system for diffusion and implantation in gallium nitride based devices'20169,287,389'Method and system for doping control in gallium nitride based devices'20169,269,793'Method and system for a gallium nitride self-aligned vertical MESFET'20169,224,828'Method and system for floating guard rings in gallium nitride materials'20159,196,679'Schottky diode with buried layer in GaN materials'20159,184,305'Method and system for a GAN vertical JFET utilizing a regrown gate'20159,171,937'Monolithically integrated vertical JFET and Schottky diode'20159,171,900'Method of fabricating a gallium nitride P-i-N diode using implantation'20159,171,751'Method and system for fabricating floating guard rings in GaN materials'20159,171,923'Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode'20159,159,784'Aluminum gallium nitride etch stop layer for gallium nitride based devices'20159,136,116'Method and system for formation of P-N junctions in gallium nitride based electronics'20159,093,395'Method and system for local control of defect density in gallium nitride based electronics'20159,093,284'Aluminum gallium nitride etch stop layer for gallium nitride based devices'20159,059,199'Method and system for a gallium nitride vertical transistor'20159,029,210'GaN vertical superjunction device structures and fabrication methods'20159,006,800'Ingan ohmic source contacts for vertical power devices'20158,969,912'Method and system for a GaN vertical JFET utilizing a regrown channel'20158,969,180'Method and system for junction termination in GaN materials using conductivity modulation'20158,969,994'Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode by regrowth and etch back'20158,946,788'Method and system for doping control in gallium nitride based devices'20158,941,117'Monolithically integrated vertical JFET and Schottky diode'20158,933,532'Schottky diode with buried layer in GaN materials'20158,927,999'Edge termination by ion implantation in GaN'20158,866,147'Method and system for a GaN self-aligned vertical MESFET'20148,846,482'Method and system for diffusion and implantation in gallium nitride based devices'20148,836,071'Gallium nitride-based schottky barrier diode with aluminum gallium nitride surface layer'20148,823,140'GaN vertical bipolar transistor'20148,822,311'Method of fabricating a GaN P-i-N diode using implantation'20148,785,975'GAN vertical superjunction device structures and fabrication methods'20148,778,788'Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode'20148,749,015'Method and system for fabricating floating guard rings in GaN materials'20148,741,707'Method and system for fabricating edge termination structures in GaN materials'20148,716,716'Method and system for junction termination in GaN materials using conductivity modulation'20148,643,134'GaN-based Schottky barrier diode with field plate'20148,592,298'Fabrication of floating guard rings using selective regrowth'20138,592,938'GaN-based Schottky barrier diode with field plate'20138,558,242'Vertical GaN-based metal insulator semiconductor FET'20138,502,234'Monolithically integrated vertical JFET and Schottky diode'20138,026,596'Thermal designs of packaged gallium nitride material devices and methods of packaging'20117,338,826'Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2011Based in Cary, NC, US· patent location history
2013–2016Patents assigned to AVOGY INC (45)· patent assignee history
2013–2015Patents assigned to KIZILYALLI ISIK C (23)· patent assignee history
2013–2015Patents assigned to NIE HUI (23)· patent assignee history
2013–2015Patents assigned to BROWN RICHARD J (20)· patent assignee history
2013–2015Patents assigned to ROMANO LINDA (19)· patent assignee history
2013–2017Based in San Jose, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| AVOGY INC | 45 | 2013–2016 |
| KIZILYALLI ISIK C | 23 | 2013–2015 |
| NIE HUI | 23 | 2013–2015 |
| BROWN RICHARD J | 20 | 2013–2015 |
| ROMANO LINDA | 19 | 2013–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 47 | 2013–2017 |
| Cary, NC, US | 2 | 2008–2011 |